diff modules/il.tp @ 348:a840e9a068a2

Get sample builtin to il module working again
author Michael Pavone <pavone@retrodev.com>
date Fri, 10 Apr 2015 00:48:42 -0700
parents f987bb2a1911
children a3b06d53bcb9
line wrap: on
line diff
--- a/modules/il.tp	Fri Apr 10 00:48:12 2015 -0700
+++ b/modules/il.tp	Fri Apr 10 00:48:42 2015 -0700
@@ -374,8 +374,10 @@
 						_target recordUsage: tracker at: address withSize: q
 					}
 					foreach: _args :_ arg {
-						//TODO: have some mechanism for properly expressing sizes of arguments
-						arg recordUsage: tracker at: address withSize: q
+						if: (not: (arg isInteger?)) {
+							//TODO: have some mechanism for properly expressing sizes of arguments
+							arg recordUsage: tracker at: address withSize: q
+						}
 					}
 				}
 				assignRegs:at:withSource:andUsage <- :assignments :address :regSrc :usage {
@@ -515,7 +517,7 @@
 			}
 		}
 
-		allocRegs:withSource <- :instarr:regSrc {
+		allocRegs:withSource <- :instarr :regSrc {
 			_regMap <- dict linear
 			_argMap <- dict linear
 
@@ -542,7 +544,7 @@
 			liveFrom:to <- :regs :from :to {
 				live <- #[]
 				foreach: regs :reg usage {
-					if: ((usage lastUsage) addrGreatEq: from) && ((usage firstUsage) addrLessEq: to) {
+					if: (addrGreatEq: (usage lastUsage) from) && (addrLessEq: (usage firstUsage) to) {
 						live append: reg
 					}
 				}
@@ -568,10 +570,10 @@
 				}
 
 				liveRegsAt <- :address {
-					_regMap liveFrom: address to: address
+					liveFrom: _regMap address to: address
 				}
 				liveArgsAt <- :address {
-					_argMap liveFrom: address to: address
+					liveFrom: _argMap  address to: address
 				}
 
 				print <- {
@@ -627,12 +629,12 @@
 			while: { curuses > 0 && (_assignments length) < (_regMap length) } do: {
 				foreach: _regMap  :reg usage {
 					if: (usage useCount) = curuses {
-						liveArgs <- _argMap liveFrom: (usage firstUsage) to: (usage lastUsage)
+						liveArgs <- liveFrom: _argMap  (usage firstUsage) to: (usage lastUsage)
 						foreach: liveArgs :_ arg {
 							regSrc allocArg: (arg num)
 						}
 
-						liveRegs <- _regMap liveFrom: (usage firstUsage) to: (usage lastUsage)
+						liveRegs <- liveFrom: _regMap (usage firstUsage) to: (usage lastUsage)
 						print: (string: reg) . " | Live: " . (liveRegs join: ", ") . ", Live Args: " . (liveArgs join: ", ") . "\n"
 						foreach: liveRegs :_ reg {
 							if: (_assignments contains?: reg) {
@@ -705,6 +707,7 @@
 			foreach: prepped :name instarr {
 				outprog append: (labels get: name)
 				foreach: instarr :_ inst {
+					print: "Translating: " . inst . "\n"
 					backend convertIL: inst to: outprog withLabels: labels
 				}
 			}
@@ -732,9 +735,17 @@
 			}
 			prog set: "fib" fib
 
-			mprog <- prog toBackend: x86
+			mprog <- toBackend: prog x86
+			foreach: mprog :_ inst {
+				print: (string: inst) . "\n"
+			}
 			ba <- bytearray executableFromBytes: mprog
-			res <- ba runWithArg: 30u64
+			res <- if: (ba length) = 0 {
+				print: "Failed to translate code\n"
+				-1
+			} else: {
+				ba runWithArg: 30u64
+			}
 			print: (string: res) . "\n"
 			0
 		}