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view modules/false.tp @ 193:4293c725394c

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Mostly complete register allocation in il module with a register source in the x86 module
author Mike Pavone <pavone@retrodev.com>
date Mon, 26 Aug 2013 19:53:16 -0700
parents 59a94f3ad56f
children 1417f13f219c
line wrap: on
line source

#{
	if <- :self trueblock {
		self
	}
	ifnot <- :self falseblock {
		falseblock:
	}
	if:else <- :self trueblock :elseblock {
		elseblock:
	}
	not <- {
		true
	}
}