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annotate 68kinst.h @ 1913:2c742812bcbb

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Fix regression at the very start of The Revenge of Shinobi
author Michael Pavone <pavone@retrodev.com>
date Wed, 01 Apr 2020 23:15:47 -0700
parents faa3a4617f62
children 8554751f17b5
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
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140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
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1 /*
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2 Copyright 2013 Michael Pavone
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3 This file is part of BlastEm.
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
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5 */
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6 #ifndef M68KINST_H_
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7 #define M68KINST_H_
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8
0
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9 #include <stdint.h>
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10
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11 #ifdef M68030
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12 #define M68020
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13 #endif
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14 #ifdef M68020
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15 #define M68010
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16 #endif
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17
0
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18 typedef enum {
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19 BIT_MOVEP_IMMED = 0,
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20 MOVE_BYTE,
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21 MOVE_LONG,
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22 MOVE_WORD,
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23 MISC,
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24 QUICK_ARITH_LOOP,
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25 BRANCH,
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26 MOVEQ,
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27 OR_DIV_SBCD,
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28 SUB_SUBX,
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29 A_LINE,
0
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30 CMP_XOR,
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31 AND_MUL_ABCD_EXG,
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32 ADD_ADDX,
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33 SHIFT_ROTATE,
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34 F_LINE
0
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35 } m68k_optypes;
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36
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37 typedef enum {
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38 M68K_ABCD,
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39 M68K_ADD,
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40 M68K_ADDX,
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41 M68K_AND,
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42 M68K_ANDI_CCR,
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43 M68K_ANDI_SR,
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44 M68K_ASL,
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45 M68K_ASR,
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46 M68K_BCC,
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47 M68K_BCHG,
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48 M68K_BCLR,
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49 M68K_BSET,
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50 M68K_BSR,
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51 M68K_BTST,
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52 M68K_CHK,
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53 M68K_CLR,
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54 M68K_CMP,
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55 M68K_DBCC,
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56 M68K_DIVS,
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57 M68K_DIVU,
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58 M68K_EOR,
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59 M68K_EORI_CCR,
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60 M68K_EORI_SR,
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61 M68K_EXG,
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62 M68K_EXT,
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63 M68K_ILLEGAL,
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64 M68K_JMP,
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65 M68K_JSR,
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66 M68K_LEA,
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67 M68K_LINK,
0
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68 M68K_LSL,
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69 M68K_LSR,
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70 M68K_MOVE,
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71 M68K_MOVE_CCR,
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72 M68K_MOVE_FROM_SR,
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73 M68K_MOVE_SR,
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74 M68K_MOVE_USP,
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75 M68K_MOVEM,
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76 M68K_MOVEP,
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77 M68K_MULS,
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78 M68K_MULU,
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79 M68K_NBCD,
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80 M68K_NEG,
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81 M68K_NEGX,
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82 M68K_NOP,
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83 M68K_NOT,
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84 M68K_OR,
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85 M68K_ORI_CCR,
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86 M68K_ORI_SR,
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87 M68K_PEA,
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88 M68K_RESET,
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89 M68K_ROL,
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90 M68K_ROR,
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91 M68K_ROXL,
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92 M68K_ROXR,
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93 M68K_RTE,
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94 M68K_RTR,
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95 M68K_RTS,
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96 M68K_SBCD,
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97 M68K_SCC,
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98 M68K_STOP,
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99 M68K_SUB,
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100 M68K_SUBX,
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101 M68K_SWAP,
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102 M68K_TAS,
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103 M68K_TRAP,
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104 M68K_TRAPV,
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105 M68K_TST,
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106 M68K_UNLK,
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107 M68K_INVALID,
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108 M68K_A_LINE_TRAP,
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109 M68K_F_LINE_TRAP,
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110 #ifdef M68010
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111 M68K_BKPT,
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112 M68K_MOVE_FROM_CCR,
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113 M68K_MOVEC,
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114 M68K_MOVES,
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115 M68K_RTD,
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116 #endif
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117 #ifdef M68020
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118 M68K_BFCHG,
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119 M68K_BFCLR,
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120 M68K_BFEXTS,
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121 M68K_BFEXTU,
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122 M68K_BFFFO,
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123 M68K_BFINS,
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124 M68K_BFSET,
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125 M68K_BFTST,
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126 M68K_CALLM,
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127 M68K_CAS,
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128 M68K_CAS2,
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129 M68K_CHK2,
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130 M68K_CMP2,
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131 M68K_CP_BCC,
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132 M68K_CP_DBCC,
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133 M68K_CP_GEN,
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134 M68K_CP_RESTORE,
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135 M68K_CP_SAVE,
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136 M68K_CP_SCC,
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137 M68K_CP_TRAPCC,
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138 M68K_DIVSL,
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139 M68K_DIVUL,
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140 M68K_EXTB,
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141 M68K_PACK,
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142 M68K_RTM,
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143 M68K_TRAPCC,
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144 M68K_UNPK,
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145 #endif
0
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146 } m68K_op;
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147
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148 typedef enum {
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149 VAR_NORMAL,
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150 VAR_QUICK,
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151 VAR_IMMEDIATE,
2
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152 VAR_BYTE,
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153 VAR_WORD,
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154 VAR_LONG
0
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155 } m68K_variant;
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156
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157 typedef enum {
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158 OPSIZE_BYTE=0,
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159 OPSIZE_WORD,
2
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160 OPSIZE_LONG,
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161 OPSIZE_INVALID,
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162 OPSIZE_UNSIZED
0
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163 } m68K_opsizes;
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164
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165 typedef enum {
2
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166 //actual addressing mode field values
0
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167 MODE_REG = 0,
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168 MODE_AREG,
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169 MODE_AREG_INDIRECT,
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170 MODE_AREG_POSTINC,
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171 MODE_AREG_PREDEC,
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172 MODE_AREG_DISPLACE,
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173 MODE_AREG_INDEX_MEM, //bunch of relatively complicated modes
2
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174 MODE_PC_INDIRECT_ABS_IMMED, //Modes that use the program counter, an absolute address or immediate value
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175 //expanded values
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176 MODE_AREG_INDEX_DISP8,
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177 #ifdef M68020
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178 MODE_AREG_INDEX_BASE_DISP,
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179 MODE_AREG_PREINDEX,
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180 MODE_AREG_POSTINDEX,
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181 MODE_AREG_MEM_INDIRECT,
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182 MODE_AREG_BASE_DISP,
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183 MODE_INDEX_BASE_DISP,
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184 MODE_PREINDEX,
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185 MODE_POSTINDEX,
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186 MODE_MEM_INDIRECT,
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187 MODE_BASE_DISP,
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188 #endif
2
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189 MODE_ABSOLUTE_SHORT,
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190 MODE_ABSOLUTE,
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191 MODE_PC_DISPLACE,
79
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192 MODE_PC_INDEX_DISP8,
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193 #ifdef M68020
638
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194 MODE_PC_INDEX_BASE_DISP,
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195 MODE_PC_PREINDEX,
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196 MODE_PC_POSTINDEX,
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197 MODE_PC_MEM_INDIRECT,
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198 MODE_PC_BASE_DISP,
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199 MODE_ZPC_INDEX_BASE_DISP,
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200 MODE_ZPC_PREINDEX,
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201 MODE_ZPC_POSTINDEX,
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202 MODE_ZPC_MEM_INDIRECT,
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203 MODE_ZPC_BASE_DISP,
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204 #endif
2
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205 MODE_IMMEDIATE,
61
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206 MODE_IMMEDIATE_WORD,//used to indicate an immediate operand that only uses a single extension word even for a long operation
2
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207 MODE_UNUSED
0
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208 } m68k_addr_modes;
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209 #ifdef M68020
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210 #define M68K_FLAG_BITFIELD 0x80
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211 #endif
0
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212
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213 typedef enum {
2
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214 COND_TRUE,
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215 COND_FALSE,
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216 COND_HIGH,
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217 COND_LOW_SAME,
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218 COND_CARRY_CLR,
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219 COND_CARRY_SET,
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220 COND_NOT_EQ,
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221 COND_EQ,
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222 COND_OVERF_CLR,
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223 COND_OVERF_SET,
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224 COND_PLUS,
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225 COND_MINUS,
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226 COND_GREATER_EQ,
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227 COND_LESS,
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228 COND_GREATER,
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229 COND_LESS_EQ
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230 } m68K_condition;
0
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231
630
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232 #ifdef M68010
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233 typedef enum {
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234 CR_SFC,
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235 CR_DFC,
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236 #ifdef M68020
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237 CR_CACR,
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238 #endif
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239 CR_USP,
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240 CR_VBR,
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241 #ifdef M68020
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242 CR_CAAR,
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243 CR_MSP,
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244 CR_ISP
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245 #endif
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246 } m68k_control_reg;
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247
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248 #ifdef M68020
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249 #define MAX_HIGH_CR 0x804
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250 #define MAX_LOW_CR 0x002
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251 #else
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252 #define MAX_HIGH_CR 0x801
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253 #define MAX_LOW_CR 0x001
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254 #endif
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255
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256 #endif
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257
0
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258 typedef struct {
636
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259 #ifdef M68020
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260 uint16_t bitfield;
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261 #endif
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262 uint8_t addr_mode;
0
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263 union {
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264 struct {
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265 uint8_t pri;
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266 uint8_t sec;
637
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267 #ifdef M68020
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268 uint8_t scale;
638
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269 uint8_t disp_sizes;
637
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270 #endif
0
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271 int32_t displacement;
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272 #ifdef M68020
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273 int32_t outer_disp;
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274 #endif
0
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275 } regs;
15
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276 uint32_t immed;
0
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277 } params;
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278 } m68k_op_info;
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279
208
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
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diff changeset
280 typedef struct m68kinst {
0
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281 uint8_t op;
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282 uint8_t variant;
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283 union {
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284 uint8_t size;
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285 uint8_t cond;
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286 } extra;
981
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diff changeset
287 uint8_t bytes;
18
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diff changeset
288 uint32_t address;
0
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289 m68k_op_info src;
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290 m68k_op_info dst;
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291 } m68kinst;
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292
226
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diff changeset
293 typedef enum {
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diff changeset
294 VECTOR_RESET_STACK,
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diff changeset
295 VECTOR_RESET_PC,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
296 VECTOR_ACCESS_FAULT,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
297 VECTOR_ADDRESS_ERROR,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
298 VECTOR_ILLEGAL_INST,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
299 VECTOR_INT_DIV_ZERO,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
300 VECTOR_CHK,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
301 VECTOR_TRAPV,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
302 VECTOR_PRIV_VIOLATION,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
303 VECTOR_TRACE,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
304 VECTOR_LINE_1010,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
305 VECTOR_LINE_1111,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
306 VECTOR_COPROC_VIOLATION=13,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
307 VECTOR_FORMAT_ERROR,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
308 VECTOR_UNINIT_INTERRUPT,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
309 VECTOR_SPURIOUS_INTERRUPT=24,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
310 VECTOR_INT_1,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
311 VECTOR_INT_2,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
312 VECTOR_INT_3,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
313 VECTOR_INT_4,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
314 VECTOR_INT_5,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
315 VECTOR_INT_6,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
316 VECTOR_INT_7,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
317 VECTOR_TRAP_0,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
318 VECTOR_TRAP_1,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
319 VECTOR_TRAP_2,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
320 VECTOR_TRAP_3,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
321 VECTOR_TRAP_4,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
322 VECTOR_TRAP_5,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
323 VECTOR_TRAP_6,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
324 VECTOR_TRAP_7,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
325 VECTOR_TRAP_8,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
326 VECTOR_TRAP_9,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
327 VECTOR_TRAP_10,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
328 VECTOR_TRAP_11,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
329 VECTOR_TRAP_12,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
330 VECTOR_TRAP_13,
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
331 VECTOR_TRAP_14,
1097
faa3a4617f62 Get Jaguar video interrupt working
Michael Pavone <pavone@retrodev.com>
parents: 992
diff changeset
332 VECTOR_TRAP_15,
faa3a4617f62 Get Jaguar video interrupt working
Michael Pavone <pavone@retrodev.com>
parents: 992
diff changeset
333 VECTOR_USER0 = 64
226
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
334 } m68k_vector;
28a6697e847b Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents: 208
diff changeset
335
634
4a6ec64acd79 Better support for labels sourced from VOS program module header
Michael Pavone <pavone@retrodev.com>
parents: 630
diff changeset
336 typedef int (*format_label_fun)(char * dst, uint32_t address, void * data);
4a6ec64acd79 Better support for labels sourced from VOS program module header
Michael Pavone <pavone@retrodev.com>
parents: 630
diff changeset
337
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
338 uint16_t * m68k_decode(uint16_t * istream, m68kinst * dst, uint32_t address);
518
775802dab98f Refactor debugger next command
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
339 uint32_t m68k_branch_target(m68kinst * inst, uint32_t *dregs, uint32_t *aregs);
775802dab98f Refactor debugger next command
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
340 uint8_t m68k_is_branch(m68kinst * inst);
775802dab98f Refactor debugger next command
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
341 uint8_t m68k_is_noncall_branch(m68kinst * inst);
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
342 int m68k_disasm(m68kinst * decoded, char * dst);
634
4a6ec64acd79 Better support for labels sourced from VOS program module header
Michael Pavone <pavone@retrodev.com>
parents: 630
diff changeset
343 int m68k_disasm_labels(m68kinst * decoded, char * dst, format_label_fun label_fun, void * data);
4a6ec64acd79 Better support for labels sourced from VOS program module header
Michael Pavone <pavone@retrodev.com>
parents: 630
diff changeset
344 int m68k_default_label_fun(char * dst, uint32_t address, void * data);
0
2432d177e1ac Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
345
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents: 10
diff changeset
346 #endif
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents: 10
diff changeset
347