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annotate rf5c164.c @ 2208:3809a0bd680e

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Fix a couple of Z80 debugger issues
author Michael Pavone <pavone@retrodev.com>
date Sat, 27 Aug 2022 22:02:09 -0700
parents 4fbe1e7c4a73
children 0d1d5dccdd28
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1 #include <stdio.h>
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2 #include "rf5c164.h"
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3
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4 enum {
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5 ENV,
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6 PAN,
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7 FDL,
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8 FDH,
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9 LSL,
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10 LSH,
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11 ST,
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12 CTRL,
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13 CHAN_ENABLE
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14 };
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15
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16 enum {
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17 START,
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18 NORMAL,
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19 LOOP
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20 };
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21
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22 #define FLAG_SOUNDING 0x80
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23 #define FLAG_PENDING 0x01
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24
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25 void rf5c164_init(rf5c164* pcm, uint32_t mclks, uint32_t divider)
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26 {
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27 pcm->audio = render_audio_source("rf5c164", mclks, divider * 384, 2);
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28 pcm->clock_step = divider * 4;
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29 }
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30
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31 void rf5c164_deinit(rf5c164* pcm)
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32 {
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33 render_free_source(pcm->audio);
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34 }
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35
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36 //48 cycles per channel
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37 //1 external write per 16 cycles
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38 //3 external writes per channel/sample
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39 // TCE pulse width is 200ns @ 10Mhz aka 2 cycles
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40 // total cycle is longer than TCE pulse, guessing 4 cycles
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41 // 12 memory access slots per channel sample
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42 // 3 for external memory writes
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43 // 1 for internal register writes?
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44 // 1 for refresh?
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45 // 6 for register reads?
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46 // or maybe 7 for register reads and writes happen when register is read?
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47
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48 #define CHECK pcm->cycle += pcm->clock_step; pcm->step++; if (pcm->cycle >= cycle) break
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49 #define CHECK_LOOP pcm->cycle += pcm->clock_step; pcm->step = 0; if (pcm->cycle >= cycle) break
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50
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51 static void write_if_not_sounding(rf5c164* pcm)
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52 {
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53 if (!(pcm->flags & FLAG_SOUNDING) && (pcm->flags & FLAG_PENDING)
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54 && pcm->pending_address >= 0x1000) {
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55 pcm->ram[(pcm->pending_address & 0xFFF) | pcm->ram_bank] = pcm->pending_byte;
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56 pcm->flags &= ~FLAG_PENDING;
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57 }
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58 }
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59
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60 static void write_always(rf5c164* pcm)
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61 {
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62 if ((pcm->flags & FLAG_PENDING) && pcm->pending_address >= 0x1000) {
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63 pcm->ram[(pcm->pending_address & 0xFFF) | pcm->ram_bank] = pcm->pending_byte;
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64 pcm->flags &= ~FLAG_PENDING;
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65 }
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66 }
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67
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68 void rf5c164_run(rf5c164* pcm, uint32_t cycle)
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69 {
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70 //TODO: Timing of this is all educated guesses based on documentation, do some real measurements
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71 while (pcm->cycle < cycle)
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72 {
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73 switch (pcm->step)
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74 {
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75 case 0:
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76 //handle internal memory write
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77 // RF5C164 datasheet seems to suggest only 1 "internal memory" write every 48 cycles when the chip is not sounding (globally)
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78 // and 1 write every 384 cycles when the chip is sounding (globally). However, games seem to expect to be able to write faster than that
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79 // RF5C68 datasheet suggests internal memory writes are unrestricted regardless of sounding status
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80 /*if ((pcm->cur_channel == pcm->selected_channel || !(pcm->flags & FLAG_SOUNDING)) && (pcm->flags & FLAG_PENDING)
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81 && pcm->pending_address <= ST
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82 ) {
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83 printf("pcm_write commit chan %d, %X - %X @ %u\n", pcm->selected_channel, pcm->pending_address, pcm->pending_byte, pcm->cycle);
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84 pcm->channels[pcm->selected_channel].regs[pcm->pending_address] = pcm->pending_byte;
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85 pcm->flags &= ~FLAG_PENDING;
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86 }*/
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87 write_if_not_sounding(pcm);
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88 CHECK;
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89 case 1:
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90 if ((pcm->flags & FLAG_SOUNDING) && !(pcm->channel_enable & (1 << pcm->cur_channel))) {
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91 if (pcm->channels[pcm->cur_channel].state == START) {
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92 pcm->channels[pcm->cur_channel].cur_ptr = pcm->channels[pcm->cur_channel].regs[ST] << 19;
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93 //printf("chan %d START %X (%X raw)\n", pcm->cur_channel, pcm->channels[pcm->cur_channel].cur_ptr >> 11, pcm->channels[pcm->cur_channel].cur_ptr);
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94 pcm->channels[pcm->cur_channel].state = NORMAL;
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95 } else if (pcm->channels[pcm->cur_channel].state == LOOP) {
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96 pcm->channels[pcm->cur_channel].cur_ptr = (pcm->channels[pcm->cur_channel].regs[LSH] << 19) | (pcm->channels[pcm->cur_channel].regs[LSL] << 11);
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97 //printf("chan %d LOOP %X (%X raw)\n", pcm->cur_channel, pcm->channels[pcm->cur_channel].cur_ptr >> 11, pcm->channels[pcm->cur_channel].cur_ptr);
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98 pcm->channels[pcm->cur_channel].state = NORMAL;
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99 }
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100 }
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101 write_if_not_sounding(pcm);
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102 CHECK;
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103 case 2: {
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104 if ((pcm->flags & FLAG_SOUNDING) && !(pcm->channel_enable & (1 << pcm->cur_channel))) {
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105 uint8_t byte = pcm->ram[pcm->channels[pcm->cur_channel].cur_ptr >> 11];
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106 if (byte == 0xFF) {
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107 pcm->channels[pcm->cur_channel].state = LOOP;
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108 } else {
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109 pcm->channels[pcm->cur_channel].sample = byte;
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110 }
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111 }
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112 write_if_not_sounding(pcm);
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113 CHECK;
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114 }
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115 case 3:
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116 write_always(pcm);
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117 CHECK;
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118 case 4:
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119 if ((pcm->flags & FLAG_SOUNDING) && !(pcm->channel_enable & (1 << pcm->cur_channel))) {
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120 pcm->channels[pcm->cur_channel].cur_ptr += (pcm->channels[pcm->cur_channel].regs[FDH] << 8) | pcm->channels[pcm->cur_channel].regs[FDL];
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121 pcm->channels[pcm->cur_channel].cur_ptr &= 0x7FFFFFF;
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122 }
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123 write_if_not_sounding(pcm);
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124 CHECK;
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125 case 5:
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126 write_if_not_sounding(pcm);
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127 CHECK;
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128 case 6:
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129 write_if_not_sounding(pcm);
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130 CHECK;
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131 case 7:
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132 write_always(pcm);
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133 CHECK;
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134 case 8:
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135 write_if_not_sounding(pcm);
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136 CHECK;
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137 case 9:
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138 if ((pcm->flags & FLAG_SOUNDING) && !(pcm->channel_enable & (1 << pcm->cur_channel))) {
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139 int16_t sample = pcm->channels[pcm->cur_channel].sample & 0x7F;
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140 if (!(pcm->channels[pcm->cur_channel].sample & 0x80)) {
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141 sample = -sample;
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142 }
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143 sample *= pcm->channels[pcm->cur_channel].regs[ENV];
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144 int16_t left = (sample * (pcm->channels[pcm->cur_channel].regs[PAN] >> 4)) >> 5;
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145 int16_t right = (sample * (pcm->channels[pcm->cur_channel].regs[PAN] & 0xF)) >> 5;
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146 //printf("chan %d, raw %X, sample %d, left %d, right %d, ptr %X (raw %X)\n", pcm->cur_channel, pcm->channels[pcm->cur_channel].sample, sample, left, right, pcm->channels[pcm->cur_channel].cur_ptr >> 11, pcm->channels[pcm->cur_channel].cur_ptr);
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147 pcm->left += left;
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148 pcm->right += right;
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149 }
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150 write_if_not_sounding(pcm);
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151 CHECK;
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152 case 10:
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153 //refresh?
2128
b0dcf5c9f353 Fix some issues with PCM dma/CPU write conflicts
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diff changeset
154 //does refresh happen at the same rate when sounding disabled? warning in sega docs suggests maybe not
b0dcf5c9f353 Fix some issues with PCM dma/CPU write conflicts
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parents: 2082
diff changeset
155 write_if_not_sounding(pcm);
2082
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156 CHECK;
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157 case 11:
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158 write_always(pcm);
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159 pcm->cur_channel++;
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160 pcm->cur_channel &= 7;
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161 if (!pcm->cur_channel) {
2145
62a53c052d9b PCM channel add should saturate on overflow, not wrap around
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parents: 2128
diff changeset
162 if (pcm->left > INT16_MAX) {
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diff changeset
163 pcm->left = INT16_MAX;
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diff changeset
164 } else if (pcm->left < INT16_MIN) {
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diff changeset
165 pcm->left = INT16_MIN;
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diff changeset
166 }
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diff changeset
167 if (pcm->right > INT16_MAX) {
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parents: 2128
diff changeset
168 pcm->right = INT16_MAX;
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diff changeset
169 } else if (pcm->right < INT16_MIN) {
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diff changeset
170 pcm->right = INT16_MIN;
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diff changeset
171 }
2082
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parents:
diff changeset
172 render_put_stereo_sample(pcm->audio, pcm->left, pcm->right);
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173 pcm->left = pcm->right = 0;
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174 }
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175 CHECK_LOOP;
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176 }
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177 }
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178 }
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179
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180 void rf5c164_write(rf5c164* pcm, uint16_t address, uint8_t value)
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181 {
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182 //printf("pcm_write %X - %X @ %u\n", address, value, pcm->cycle);
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parents:
diff changeset
183 if (address == CTRL) {
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184 pcm->flags &= ~FLAG_SOUNDING;
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185 pcm->flags |= value & FLAG_SOUNDING;
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parents:
diff changeset
186 if (value & 0x40) {
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diff changeset
187 pcm->selected_channel = value & 0x7;
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188 //printf("selected channel %d\n", pcm->selected_channel);
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189 } else {
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diff changeset
190 pcm->ram_bank = value << 12 & 0xF000;
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191 //printf("selected RAM bank %X\n", pcm->ram_bank);
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192 }
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diff changeset
193 if (!(pcm->flags & FLAG_SOUNDING)) {
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diff changeset
194 pcm->left = pcm->right = 0;
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195 }
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196 } else if (address == CHAN_ENABLE) {
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diff changeset
197 uint8_t changed = pcm->channel_enable ^ value;
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diff changeset
198 pcm->channel_enable = value;
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diff changeset
199 for (int i = 0; i < 8; i++)
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diff changeset
200 {
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parents:
diff changeset
201 int mask = 1 << i;
2145
62a53c052d9b PCM channel add should saturate on overflow, not wrap around
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parents: 2128
diff changeset
202 if ((changed & mask) && !(mask & value)) {
2082
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parents:
diff changeset
203 pcm->channels[i].state = START;
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diff changeset
204 }
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diff changeset
205 }
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parents:
diff changeset
206 } else if (address <= ST) {
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parents:
diff changeset
207 //See note in first step of rf5c164_run
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diff changeset
208 pcm->channels[pcm->selected_channel].regs[address] = value;
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parents:
diff changeset
209 } else {
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parents:
diff changeset
210 pcm->pending_address = address;
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parents:
diff changeset
211 pcm->pending_byte = value;
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parents:
diff changeset
212 pcm->flags |= FLAG_PENDING;
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parents:
diff changeset
213 }
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parents:
diff changeset
214 }
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parents:
diff changeset
215
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parents:
diff changeset
216 uint8_t rf5c164_read(rf5c164* pcm, uint16_t address)
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parents:
diff changeset
217 {
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parents:
diff changeset
218 if (address >= 0x10 && address < 0x20) {
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parents:
diff changeset
219 uint16_t chan = address >> 1 & 0x7;
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parents:
diff changeset
220 if (address & 1) {
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parents:
diff changeset
221 return pcm->channels[chan].cur_ptr >> 19;
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parents:
diff changeset
222 } else {
485834c0fea7 Forgot to add PCM source files
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
223 return pcm->channels[chan].cur_ptr >> 11;
485834c0fea7 Forgot to add PCM source files
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parents:
diff changeset
224 }
485834c0fea7 Forgot to add PCM source files
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parents:
diff changeset
225 } else if (address >= 0x1000 && !(pcm->flags & FLAG_SOUNDING)) {
485834c0fea7 Forgot to add PCM source files
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parents:
diff changeset
226 return pcm->ram[pcm->ram_bank | (address & 0xFFF)];
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parents:
diff changeset
227 } else {
485834c0fea7 Forgot to add PCM source files
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
228 return 0xFF;
485834c0fea7 Forgot to add PCM source files
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
229 }
485834c0fea7 Forgot to add PCM source files
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
230 }