Mercurial > repos > blastem
annotate backend.c @ 1971:80920c21bb52
Add an event log soft flush and call it twice per frame in between hard flushes to netplay latency when there are insufficient hardware updates to flush packets in the middle of a frame
author | Michael Pavone <pavone@retrodev.com> |
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date | Fri, 08 May 2020 11:40:30 -0700 |
parents | 9d35ce5012a6 |
children | a7b753e260a2 45c4b74e7676 |
rev | line source |
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1 /* |
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2 Copyright 2013 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include "backend.h" |
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7 #include <stdlib.h> |
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8 |
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9 deferred_addr * defer_address(deferred_addr * old_head, uint32_t address, uint8_t *dest) |
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10 { |
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11 deferred_addr * new_head = malloc(sizeof(deferred_addr)); |
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12 new_head->next = old_head; |
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13 new_head->address = address & 0xFFFFFF; |
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14 new_head->dest = dest; |
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15 return new_head; |
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16 } |
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17 |
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18 void remove_deferred_until(deferred_addr **head_ptr, deferred_addr * remove_to) |
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19 { |
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20 for(deferred_addr *cur = *head_ptr; cur && cur != remove_to; cur = *head_ptr) |
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21 { |
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22 *head_ptr = cur->next; |
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23 free(cur); |
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24 } |
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25 } |
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26 |
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27 void process_deferred(deferred_addr ** head_ptr, void * context, native_addr_func get_native) |
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28 { |
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29 deferred_addr * cur = *head_ptr; |
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30 deferred_addr **last_next = head_ptr; |
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31 while(cur) |
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32 { |
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33 code_ptr native = get_native(context, cur->address);//get_native_address(opts->native_code_map, cur->address); |
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34 if (native) { |
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35 int32_t disp = native - (cur->dest + 4); |
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36 code_ptr out = cur->dest; |
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37 *(out++) = disp; |
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38 disp >>= 8; |
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39 *(out++) = disp; |
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40 disp >>= 8; |
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41 *(out++) = disp; |
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42 disp >>= 8; |
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43 *out = disp; |
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44 *last_next = cur->next; |
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45 free(cur); |
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46 cur = *last_next; |
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47 } else { |
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48 last_next = &(cur->next); |
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49 cur = cur->next; |
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50 } |
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51 } |
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52 } |
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53 |
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54 memmap_chunk const *find_map_chunk(uint32_t address, cpu_options *opts, uint16_t flags, uint32_t *size_sum) |
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55 { |
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56 if (size_sum) { |
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57 *size_sum = 0; |
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58 } |
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59 address &= opts->address_mask; |
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60 for (memmap_chunk const *cur = opts->memmap, *end = opts->memmap + opts->memmap_chunks; cur != end; cur++) |
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61 { |
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62 if (address >= cur->start && address < cur->end) { |
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63 return cur; |
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64 } else if (size_sum && (cur->flags & flags) == flags) { |
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65 *size_sum += chunk_size(opts, cur); |
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66 } |
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67 } |
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68 return NULL; |
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69 } |
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70 |
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71 void * get_native_pointer(uint32_t address, void ** mem_pointers, cpu_options * opts) |
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72 { |
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73 memmap_chunk const * memmap = opts->memmap; |
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74 address &= opts->address_mask; |
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75 for (uint32_t chunk = 0; chunk < opts->memmap_chunks; chunk++) |
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76 { |
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77 if (address >= memmap[chunk].start && address < memmap[chunk].end) { |
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78 if (!(memmap[chunk].flags & (MMAP_READ|MMAP_READ_CODE))) { |
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79 return NULL; |
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80 } |
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81 uint8_t * base = memmap[chunk].flags & MMAP_PTR_IDX |
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82 ? mem_pointers[memmap[chunk].ptr_index] |
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83 : memmap[chunk].buffer; |
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84 if (!base) { |
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85 if (memmap[chunk].flags & MMAP_AUX_BUFF) { |
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86 return ((uint8_t *)memmap[chunk].buffer) + (address & memmap[chunk].aux_mask); |
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87 } |
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88 return NULL; |
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89 } |
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90 return base + (address & memmap[chunk].mask); |
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91 } |
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92 } |
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93 return NULL; |
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94 } |
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95 |
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96 void * get_native_write_pointer(uint32_t address, void ** mem_pointers, cpu_options * opts) |
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97 { |
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98 memmap_chunk const * memmap = opts->memmap; |
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99 address &= opts->address_mask; |
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100 for (uint32_t chunk = 0; chunk < opts->memmap_chunks; chunk++) |
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101 { |
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102 if (address >= memmap[chunk].start && address < memmap[chunk].end) { |
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103 if (!(memmap[chunk].flags & (MMAP_WRITE))) { |
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104 return NULL; |
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105 } |
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106 uint8_t * base = memmap[chunk].flags & MMAP_PTR_IDX |
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107 ? mem_pointers[memmap[chunk].ptr_index] |
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108 : memmap[chunk].buffer; |
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109 if (!base) { |
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110 if (memmap[chunk].flags & MMAP_AUX_BUFF) { |
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111 return ((uint8_t *)memmap[chunk].buffer) + (address & memmap[chunk].aux_mask); |
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112 } |
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113 return NULL; |
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114 } |
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115 return base + (address & memmap[chunk].mask); |
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116 } |
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117 } |
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118 return NULL; |
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119 } |
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120 |
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121 uint16_t read_word(uint32_t address, void **mem_pointers, cpu_options *opts, void *context) |
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122 { |
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123 memmap_chunk const *chunk = find_map_chunk(address, opts, 0, NULL); |
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124 if (!chunk) { |
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125 return 0xFFFF; |
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126 } |
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127 uint32_t offset = address & chunk->mask; |
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128 if (chunk->flags & MMAP_READ) { |
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129 uint8_t *base; |
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130 if (chunk->flags & MMAP_PTR_IDX) { |
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131 base = mem_pointers[chunk->ptr_index]; |
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132 } else { |
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133 base = chunk->buffer; |
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134 } |
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135 if (base) { |
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136 uint16_t val; |
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137 if ((chunk->flags & MMAP_ONLY_ODD) || (chunk->flags & MMAP_ONLY_EVEN)) { |
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138 offset /= 2; |
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139 val = base[offset]; |
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140 if (chunk->flags & MMAP_ONLY_ODD) { |
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141 val |= 0xFF00; |
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142 } else { |
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143 val = val << 8 | 0xFF; |
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144 } |
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145 } else { |
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146 val = *(uint16_t *)(base + offset); |
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147 } |
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148 return val; |
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149 } |
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150 } |
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151 if ((!(chunk->flags & MMAP_READ) || (chunk->flags & MMAP_FUNC_NULL)) && chunk->read_16) { |
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152 return chunk->read_16(offset, context); |
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153 } |
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154 return 0xFFFF; |
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155 } |
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156 |
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157 void write_word(uint32_t address, uint16_t value, void **mem_pointers, cpu_options *opts, void *context) |
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158 { |
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159 memmap_chunk const *chunk = find_map_chunk(address, opts, 0, NULL); |
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160 if (!chunk) { |
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161 return; |
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162 } |
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163 uint32_t offset = address & chunk->mask; |
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164 if (chunk->flags & MMAP_WRITE) { |
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165 uint8_t *base; |
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166 if (chunk->flags & MMAP_PTR_IDX) { |
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167 base = mem_pointers[chunk->ptr_index]; |
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168 } else { |
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169 base = chunk->buffer; |
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170 } |
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171 if (base) { |
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172 if ((chunk->flags & MMAP_ONLY_ODD) || (chunk->flags & MMAP_ONLY_EVEN)) { |
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173 offset /= 2; |
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174 if (chunk->flags & MMAP_ONLY_EVEN) { |
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175 value >>= 16; |
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176 } |
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177 base[offset] = value; |
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178 } else { |
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179 *(uint16_t *)(base + offset) = value; |
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180 } |
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181 return; |
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182 } |
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183 } |
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184 if ((!(chunk->flags & MMAP_WRITE) || (chunk->flags & MMAP_FUNC_NULL)) && chunk->write_16) { |
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185 chunk->write_16(offset, context, value); |
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186 } |
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187 } |
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188 |
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189 uint8_t read_byte(uint32_t address, void **mem_pointers, cpu_options *opts, void *context) |
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190 { |
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191 memmap_chunk const *chunk = find_map_chunk(address, opts, 0, NULL); |
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192 if (!chunk) { |
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193 return 0xFF; |
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194 } |
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195 uint32_t offset = address & chunk->mask; |
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196 if (chunk->flags & MMAP_READ) { |
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197 uint8_t *base; |
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198 if (chunk->flags & MMAP_PTR_IDX) { |
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199 base = mem_pointers[chunk->ptr_index]; |
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200 } else { |
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201 base = chunk->buffer; |
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202 } |
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203 if (base) { |
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204 if ((chunk->flags & MMAP_ONLY_ODD) || (chunk->flags & MMAP_ONLY_EVEN)) { |
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205 if (address & 1) { |
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206 if (chunk->flags & MMAP_ONLY_EVEN) { |
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207 return 0xFF; |
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208 } |
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209 } else if (chunk->flags & MMAP_ONLY_ODD) { |
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210 return 0xFF; |
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211 } |
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212 offset /= 2; |
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213 } else if(opts->byte_swap) { |
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214 offset ^= 1; |
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215 } |
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216 return base[offset]; |
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217 } |
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218 } |
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219 if ((!(chunk->flags & MMAP_READ) || (chunk->flags & MMAP_FUNC_NULL)) && chunk->read_8) { |
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220 return chunk->read_8(offset, context); |
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221 } |
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222 return 0xFF; |
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223 } |
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224 |
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225 void write_byte(uint32_t address, uint8_t value, void **mem_pointers, cpu_options *opts, void *context) |
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226 { |
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227 memmap_chunk const *chunk = find_map_chunk(address, opts, 0, NULL); |
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228 if (!chunk) { |
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229 return; |
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230 } |
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231 uint32_t offset = address & chunk->mask; |
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232 if (chunk->flags & MMAP_WRITE) { |
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233 uint8_t *base; |
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234 if (chunk->flags & MMAP_PTR_IDX) { |
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235 base = mem_pointers[chunk->ptr_index]; |
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236 } else { |
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237 base = chunk->buffer; |
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238 } |
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239 if (base) { |
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240 if ((chunk->flags & MMAP_ONLY_ODD) || (chunk->flags & MMAP_ONLY_EVEN)) { |
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241 if (address & 1) { |
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242 if (chunk->flags & MMAP_ONLY_EVEN) { |
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243 return; |
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244 } |
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245 } else if (chunk->flags & MMAP_ONLY_ODD) { |
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246 return; |
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247 } |
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248 offset /= 2; |
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249 } else if(opts->byte_swap) { |
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250 offset ^= 1; |
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251 } |
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252 base[offset] = value; |
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253 } |
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254 } |
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255 if ((!(chunk->flags & MMAP_WRITE) || (chunk->flags & MMAP_FUNC_NULL)) && chunk->write_8) { |
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256 chunk->write_8(offset, context, value); |
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257 } |
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258 } |
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259 |
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260 uint32_t chunk_size(cpu_options *opts, memmap_chunk const *chunk) |
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261 { |
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262 if (chunk->mask == opts->address_mask) { |
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263 return chunk->end - chunk->start; |
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264 } else { |
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265 return chunk->mask + 1; |
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266 } |
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267 } |
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268 |
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269 uint32_t ram_size(cpu_options *opts) |
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270 { |
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271 uint32_t size = 0; |
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272 for (int i = 0; i < opts->memmap_chunks; i++) |
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273 { |
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274 if (opts->memmap[i].flags & MMAP_CODE) { |
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275 if (opts->memmap[i].mask == opts->address_mask) { |
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276 size += opts->memmap[i].end - opts->memmap[i].start; |
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277 } else { |
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278 size += opts->memmap[i].mask + 1; |
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279 } |
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280 } |
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281 } |
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282 return size; |
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283 } |