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annotate zruntime.S @ 583:819921b76b4b

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Use update_flags instead of individual set_flag calls in a few places
author Michael Pavone <pavone@retrodev.com>
date Fri, 07 Mar 2014 17:51:40 -0800
parents b3738ee58195
children 6b248602ab84
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
284
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
1 z_inccycles_io:
ed7098f717d7 Implement IN and OUT (untested)
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parents: 281
diff changeset
2 cmp %edi, %ebp
ed7098f717d7 Implement IN and OUT (untested)
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parents: 281
diff changeset
3 jnb do_limit
ed7098f717d7 Implement IN and OUT (untested)
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parents: 281
diff changeset
4 no_sync_io:
ed7098f717d7 Implement IN and OUT (untested)
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parents: 281
diff changeset
5 add $4, %ebp
ed7098f717d7 Implement IN and OUT (untested)
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parents: 281
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6 ret
ed7098f717d7 Implement IN and OUT (untested)
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parents: 281
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7 do_limit_io:
ed7098f717d7 Implement IN and OUT (untested)
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parents: 281
diff changeset
8 cmp 112(%rsi), %ebp
ed7098f717d7 Implement IN and OUT (untested)
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parents: 281
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9 jb no_sync_io
ed7098f717d7 Implement IN and OUT (untested)
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parents: 281
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10 jmp sync_io
ed7098f717d7 Implement IN and OUT (untested)
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11
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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12 z_inccycles:
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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parents:
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13 cmp %edi, %ebp
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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14 jnb do_limit
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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parents:
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15 no_sync:
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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16 add $3, %ebp
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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parents:
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17 ret
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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parents:
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18 do_limit:
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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diff changeset
19 cmp 112(%rsi), %ebp
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
20 jb no_sync
284
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
21 sync_io:
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 393
diff changeset
22 movw $0, 164(%rsi)
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
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23 call z80_save_context_scratch
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
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24 pop %rax /*return address in read/write func*/
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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parents:
diff changeset
25 pop 104(%rsi) /*return address in native code*/
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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parents:
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26 sub $5, %rax /* adjust return addres to point to the call instruction that got us here */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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parents:
diff changeset
27 mov %rax, (%rsi)
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 393
diff changeset
28
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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29 pop %r15 /* restore callee saved regsiters */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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parents:
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30 pop %r14
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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31 pop %r13
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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32 pop %r12
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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33 pop %rbp
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34 pop %rbx
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35 ret /* return to caller of z80_run */
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 393
diff changeset
36
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
37 forced_sync:
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
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parents: 507
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38 movw $0, 164(%rsi)
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
39 call z80_save_context_scratch
509
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
40 pop (%rsi) /*return address in read/write func*/
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
41 pop 104(%rsi) /*return address in native code*/
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
42
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
43 pop %r15 /* restore callee saved regsiters */
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
44 pop %r14
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
45 pop %r13
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
46 pop %r12
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
47 pop %rbp
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
48 pop %rbx
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
49 ret /* return to caller of z80_run */
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
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50
249
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51 .global z80_handle_cycle_limit_int
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52 z80_handle_cycle_limit_int:
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53 cmp 116(%rsi), %ebp
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54 jb zskip_int
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55 mov 112(%rsi), %ebp /* set cycle limit to sync cycle */
375
134ffb72d7a1 Clear IFF1 and IFF2 when an interrupt is taken on the Z80
Mike Pavone <pavone@retrodev.com>
parents: 357
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56 /* not sure this is really necessary now that IFF1 and IFF2 are geting cleared */
335
14a937097c2b Some Z80 interrupt fixes
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57 movl $0xFFFFFFFF, 116(%rsi) /* make sure the interrupt doesn't fire more than once */
375
134ffb72d7a1 Clear IFF1 and IFF2 when an interrupt is taken on the Z80
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58 /* disable interrupts */
134ffb72d7a1 Clear IFF1 and IFF2 when an interrupt is taken on the Z80
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59 movb $0, 96(%rsi)
134ffb72d7a1 Clear IFF1 and IFF2 when an interrupt is taken on the Z80
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parents: 357
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60 movb $0, 97(%rsi)
249
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61 add $7, %ebp
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62 sub $2, %r9w
259
d9417261366f Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
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parents: 253
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63 mov %r9w, %r14w
249
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64 call z_inccycles
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d9417261366f Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
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65 push %r13
249
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66 call z80_write_byte_noinc
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d9417261366f Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
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67 pop %r13
d9417261366f Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
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parents: 253
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68 mov %r9w, %r14w
d9417261366f Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
Mike Pavone <pavone@retrodev.com>
parents: 253
diff changeset
69 add $1, %r14w
d9417261366f Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
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parents: 253
diff changeset
70 shr $8, %r13w
249
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71 call z_inccycles
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72 call z80_write_byte_noinc
276
eec7072189a1 Fix crash bug in Z80 interrupt support
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73 pop %r14 /*dispose of return address */
249
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74 /* TODO: Support interrupt mode 0 and 2 */
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75 mov $0x38, %r13w
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76 call z80_native_addr
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77 jmp *%r13
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78 zskip_int:
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79 cmp 112(%rsi), %ebp
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80 jb zskip_sync
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 393
diff changeset
81 mov %r13w, 164(%rsi)
249
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82 .global z80_do_sync
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83 z80_do_sync:
281
44f0bbf57b4f Save context in z80_do_sync
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84 call z80_save_context
249
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85 pop (%rsi) /*return address in native code*/
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86 pop %r15 /* restore callee saved regsiters */
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87 pop %r14
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88 pop %r13
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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89 pop %r12
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90 pop %rbp
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91 pop %rbx
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92 zskip_sync:
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93 ret
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94
285
021aeb6df19b Implement HALT (sort of tested)
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parents: 284
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95 .global z80_halt
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96 z80_halt:
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97 mov %edi, %r14d
021aeb6df19b Implement HALT (sort of tested)
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parents: 284
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98 sub %ebp, %r14d
021aeb6df19b Implement HALT (sort of tested)
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parents: 284
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99 and $0xFFFFFFFC, %r14d
021aeb6df19b Implement HALT (sort of tested)
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parents: 284
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100 add %r14d, %ebp
021aeb6df19b Implement HALT (sort of tested)
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parents: 284
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101 cmp %edi, %ebp
021aeb6df19b Implement HALT (sort of tested)
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parents: 284
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102 jnb z80_handle_cycle_limit_int
021aeb6df19b Implement HALT (sort of tested)
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parents: 284
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103 add $4, %ebp
021aeb6df19b Implement HALT (sort of tested)
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parents: 284
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104 jmp z80_handle_cycle_limit_int
021aeb6df19b Implement HALT (sort of tested)
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parents: 284
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105
249
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106 .global z80_read_byte
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107 z80_read_byte:
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108 call z_inccycles
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109 z80_read_byte_noinc:
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110 cmp $0x4000, %r13w
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111 jb z80_read_ram
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112 cmp $0x8000, %r13w
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113 jae z80_read_bank
290
171f97e70d85 Implement writes from Z80 to YM-2612
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parents: 285
diff changeset
114 cmp $0x6000, %r13w
171f97e70d85 Implement writes from Z80 to YM-2612
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parents: 285
diff changeset
115 jb z80_read_ym2612
249
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116 /* TODO: Bank reg, YM-2612, PSG/VDP */
280
9ee64039ddeb Fix bank register update
Mike Pavone <pavone@retrodev.com>
parents: 279
diff changeset
117 mov $0xFF, %r13b
249
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118 ret
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119 z80_read_ram:
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120 and $0x1FFF, %r13
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121 mov (%r11, %r13), %r13b
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parents:
diff changeset
122 ret
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
123 z80_read_bank:
509
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
124 /* approximation of wait states for normal 68K bus access */
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
125 add $3, %ebp
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
126 push %rsi
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
127 mov 144(%rsi), %rsi /* get system context pointer */
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
128 cmp $0, 120(%rsi) /* check bus busy flag */
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
129 pop %rsi
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
130 jne bus_busy
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
131 z80_read_bank_cont:
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
132 and $0x7FFF, %r13
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
133 cmp $0, %r12
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
134 je slow_bank_read
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
135 /* 68K memory is byte swapped */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
136 xor $1, %r13
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
137 mov (%r12, %r13), %r13b
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
138 ret
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
139 slow_bank_read:
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
140 /* TODO: Call into C to implement this */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
141 ret
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
142 bus_busy:
509
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
143 cmp %ebp, %edi
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
144 jbe no_adjust
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
145 mov %edi, %ebp
509
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
146 no_adjust:
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
147 call forced_sync
509
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
148 jmp z80_read_bank_cont
290
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
149 z80_read_ym2612:
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
150 call z80_save_context
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
151 mov %r13w, %di
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
152 push %rsi
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
153 call z80_read_ym
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
154 pop %rsi
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
155 mov %al, %r13b
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
156 call z80_load_context
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
157 ret
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
158
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
159 .global z80_write_byte
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
160 z80_write_byte:
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
161 call z_inccycles
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
162 z80_write_byte_noinc:
253
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
163 cmp $0x4000, %r14w
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
164 jb z80_write_ram
253
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
165 cmp $0x8000, %r14w
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
166 jae z80_write_bank
253
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
167 cmp $0x6000, %r14w
290
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
168 jb z80_write_ym2612
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
169 cmp $0x6100, %r14w
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
170 jb z80_write_bank_reg
357
fa7ea48be9a9 Allow VDP/PSG writes from Z80
Mike Pavone <pavone@retrodev.com>
parents: 335
diff changeset
171 cmp $0x7F00, %r14w
fa7ea48be9a9 Allow VDP/PSG writes from Z80
Mike Pavone <pavone@retrodev.com>
parents: 335
diff changeset
172 jae z80_write_vdp
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
173 ret
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
174 z80_write_ram:
253
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
175 and $0x1FFF, %r14
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
176 mov %r13b, (%r11, %r14)
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
177 mov %r14d, %r13d
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
178 shr $7, %r13d
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
179 bt %r13d, 152(%rsi)
252
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
180 jnc not_code
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
181 call z80_save_context
253
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
182 mov %r14d, %edi
252
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
183 call z80_handle_code_write
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
184 mov %rax, %rsi
261
f0c53a4bbfa3 Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
Mike Pavone <pavone@retrodev.com>
parents: 259
diff changeset
185 call z80_load_context
252
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
186 not_code:
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
187 ret
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
188 z80_write_bank:
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
189 slow_bank_write:
507
cc6030bd04c6 Add 3 wait states to Z80 access to bank area since that seems to be roughly the average in normal usage
Michael Pavone <pavone@retrodev.com>
parents: 451
diff changeset
190 /* approximation of wait states for 68K bus access */
cc6030bd04c6 Add 3 wait states to Z80 access to bank area since that seems to be roughly the average in normal usage
Michael Pavone <pavone@retrodev.com>
parents: 451
diff changeset
191 add $3, %ebp
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
192 /* TODO: Call into C to implement this */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
193 ret
290
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
194 z80_write_ym2612:
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
195 and $0x3, %r14w
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
196 call z80_save_context
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
197 mov %r14w, %di
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
198 mov %r13b, %dl
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
199 call z80_write_ym
171f97e70d85 Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents: 285
diff changeset
200 mov %rax, %rsi
357
fa7ea48be9a9 Allow VDP/PSG writes from Z80
Mike Pavone <pavone@retrodev.com>
parents: 335
diff changeset
201 jmp z80_load_context
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
202 z80_write_bank_reg:
253
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
203 and $1, %r13w
280
9ee64039ddeb Fix bank register update
Mike Pavone <pavone@retrodev.com>
parents: 279
diff changeset
204 shr %r15w
9ee64039ddeb Fix bank register update
Mike Pavone <pavone@retrodev.com>
parents: 279
diff changeset
205 shl $8, %r13w
9ee64039ddeb Fix bank register update
Mike Pavone <pavone@retrodev.com>
parents: 279
diff changeset
206 xor %r12, %r12
253
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
207 or %r13w, %r15w
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
208 and $0x1FF, %r15w
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
209 cmp $0x80, %r15w
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
210 jb update_bank_ptr
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
211 ret
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
212 update_bank_ptr:
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
213 mov %r15w, %r12w
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
214 shl $15, %r12
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
215 add 80(%rsi), %r12
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
216 ret
357
fa7ea48be9a9 Allow VDP/PSG writes from Z80
Mike Pavone <pavone@retrodev.com>
parents: 335
diff changeset
217 z80_write_vdp:
fa7ea48be9a9 Allow VDP/PSG writes from Z80
Mike Pavone <pavone@retrodev.com>
parents: 335
diff changeset
218 and $0xFF, %r14w
fa7ea48be9a9 Allow VDP/PSG writes from Z80
Mike Pavone <pavone@retrodev.com>
parents: 335
diff changeset
219 call z80_save_context
fa7ea48be9a9 Allow VDP/PSG writes from Z80
Mike Pavone <pavone@retrodev.com>
parents: 335
diff changeset
220 mov %r14w, %di
fa7ea48be9a9 Allow VDP/PSG writes from Z80
Mike Pavone <pavone@retrodev.com>
parents: 335
diff changeset
221 mov %r13b, %dl
fa7ea48be9a9 Allow VDP/PSG writes from Z80
Mike Pavone <pavone@retrodev.com>
parents: 335
diff changeset
222 call z80_vdp_port_write
fa7ea48be9a9 Allow VDP/PSG writes from Z80
Mike Pavone <pavone@retrodev.com>
parents: 335
diff changeset
223 mov %rax, %rsi
fa7ea48be9a9 Allow VDP/PSG writes from Z80
Mike Pavone <pavone@retrodev.com>
parents: 335
diff changeset
224 jmp z80_load_context
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
225
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
226 .global z80_read_word
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
227 z80_read_word:
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
228 call z_inccycles
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
229 cmp $0x8000, %r13w
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
230 jae z80_read_bank_word
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
231 push %r13
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
232 call z80_read_byte_noinc
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
233 mov %r13b, %r14b
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
234 pop %r13
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
235 inc %r13
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
236 call z_inccycles
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
237 call z80_read_byte_noinc
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
238 shl $8, %r13w
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
239 mov %r14b, %r13b
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
240 ret
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
241
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
242 z80_read_bank_word:
509
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
243 add $3, %ebp /* first read typically has 3 wait states */
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
244 push %rsi
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
245 mov 144(%rsi), %rsi /* get system context pointer */
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
246 cmp $0, 120(%rsi) /* check bus busy flag */
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
247 pop %rsi
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
248 jne bus_busy_word
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
249 z80_read_bank_word_cont:
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
250 push %r13
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
251 call z80_read_bank_cont
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
252 mov %r13b, %r14b
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
253 pop %r13
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
254 inc %r13
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
255 call z_inccycles
509
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
256 add $4, %ebp /* second read typically has 4 wait states */
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
257 push %rsi
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
258 mov 144(%rsi), %rsi /* get system context pointer */
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
259 cmp $0, 120(%rsi) /* check bus busy flag */
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
260 pop %rsi
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
261 jne bus_busy_word2
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
262 z80_read_bank_word_cont2:
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
263 call z80_read_bank_cont
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
264 shl $8, %r13w
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
265 mov %r14b, %r13b
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
266 ret
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
267
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
268 bus_busy_word:
509
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
269 cmp %ebp, %edi
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
270 jb no_adjust_word
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
271 mov %edi, %ebp
509
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
272 no_adjust_word:
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
273 call forced_sync
509
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
274 jmp z80_read_bank_word_cont
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
275
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
276 foofoo:
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
277 jmp foofoo
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
278
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
279 bus_busy_word2:
509
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
280 cmp %ebp, %edi
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
281 jb no_adjust_word2
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
282 mov %edi, %ebp
509
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
283 no_adjust_word2:
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
284 call forced_sync
509
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
285 jmp z80_read_bank_word_cont2
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
286 blahblah:
b3738ee58195 Fix accidental use of the conditional jump instruction jp instead of jmp
Michael Pavone <pavone@retrodev.com>
parents: 508
diff changeset
287 jmp blahblah
508
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
Michael Pavone <pavone@retrodev.com>
parents: 507
diff changeset
288
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
289 .global z80_write_word_highfirst
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
290 z80_write_word_highfirst:
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
291 call z_inccycles
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
292 push %r14
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
293 push %r13
253
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
294 add $1, %r14w
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
295 shr $8, %r13w
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
296 call z80_write_byte_noinc
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
297 pop %r13
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
298 pop %r14
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
299 call z_inccycles
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
300 call z80_write_byte_noinc
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
301 ret
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
302
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
303 .global z80_write_word_lowfirst
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
304 z80_write_word_lowfirst:
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
305 call z_inccycles
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
306 push %r14
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
307 push %r13
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
308 call z80_write_byte_noinc
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
309 pop %r13
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
310 pop %r14
253
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
311 add $1, %r14w
3b34deba4ca0 Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents: 252
diff changeset
312 shr $8, %r13w
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
313 call z_inccycles
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
314 call z80_write_byte_noinc
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
315 ret
284
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
316
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
317 .global z80_io_read
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
318 z80_io_read:
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
319 call z_inccycles_io
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
320 /* genesis Z80 has no IO port hardware and always returns FF */
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
321 mov $0xFF, %r13
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
322 ret
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
323
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
324 .global z80_io_write
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
325 z80_io_write:
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
326 call z_inccycles_io
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
327 /* genesis Z80 has no IO port hardware and writes have no effect */
ed7098f717d7 Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents: 281
diff changeset
328 ret
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 393
diff changeset
329
252
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
330 .global z80_retrans_stub
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
331 z80_retrans_stub:
390
561fe3ea3fc8 Use a call instruction to figure out the original native address when retranslating so that it does not get lost when the byte transforms from a instruction word to extension word
Mike Pavone <pavone@retrodev.com>
parents: 375
diff changeset
332 pop %r14
252
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
333 call z80_save_context
390
561fe3ea3fc8 Use a call instruction to figure out the original native address when retranslating so that it does not get lost when the byte transforms from a instruction word to extension word
Mike Pavone <pavone@retrodev.com>
parents: 375
diff changeset
334 /* adjust for mov and call instructions */
393
30c250a41629 Fix address adjustement in z80_retrans_stub
Mike Pavone <pavone@retrodev.com>
parents: 390
diff changeset
335 sub $11, %r14
252
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
336 mov %r13d, %edi
390
561fe3ea3fc8 Use a call instruction to figure out the original native address when retranslating so that it does not get lost when the byte transforms from a instruction word to extension word
Mike Pavone <pavone@retrodev.com>
parents: 375
diff changeset
337 mov %r14, %rdx
252
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
338 push %rsi
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
339 call z80_retranslate_inst
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
340 pop %rsi
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
341 mov %rax, %r13
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
342 call z80_load_context
63b9a500a00b Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents: 249
diff changeset
343 jmp *%r13
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
344
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
345 .global z80_native_addr
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
346 z80_native_addr:
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
347 call z80_save_context
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
348 push %rsi
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 393
diff changeset
349 mov %rsi, %rdi
249
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
350 movzx %r13w, %esi
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
351 call z80_get_native_address_trans
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
352 mov %rax, %r13
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
353 pop %rsi
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
354 call z80_load_context
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
355 ret
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
356
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
357 z80_save_context_scratch:
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
358 mov %r13w, 98(%rsi) /* scratch1 */
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parents:
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359 mov %r14w, 100(%rsi) /* scratch2 */
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b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
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360
249
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361 .global z80_save_context
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362 z80_save_context:
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363 mov %r9w, 8(%rsi) /* SP */
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parents:
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364 mov %r15w, 16(%rsi) /* bank register */
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parents:
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365 mov %bx, 18(%rsi) /* BC */
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parents:
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366 mov %cx, 20(%rsi) /* DE */
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parents:
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367 mov %ax, 22(%rsi) /* HL */
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parents:
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368 mov %dx, 24(%rsi) /* IX */
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parents:
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369 mov %r8w, 26(%rsi) /* IY */
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parents:
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370 mov %r10b, 30(%rsi) /* A */
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parents:
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371 mov %edi, 48(%rsi) /* target_cycle */
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parents:
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372 mov %ebp, 52(%rsi) /* current_cycle */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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parents:
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373 mov %r12, 72(%rsi) /* cartridge bank pointer */
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parents:
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374 ret
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parents:
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375
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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parents:
diff changeset
376
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parents:
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377 z80_load_context_scratch:
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parents:
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378 mov 98(%rsi), %r13w /* scratch1 */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
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379 mov 100(%rsi), %r14w /* scratch2 */
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
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parents: 393
diff changeset
380
249
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381 .global z80_load_context
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382 z80_load_context:
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383 mov 8(%rsi), %r9w /* SP */
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Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
384 mov 16(%rsi), %r15w /* bank register */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
385 mov 18(%rsi), %bx /* BC */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
386 mov 20(%rsi), %cx /* DE */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
387 mov 22(%rsi), %ax /* HL */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
388 mov 24(%rsi), %dx /* IX */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
389 mov 26(%rsi), %r8w /* IY */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
390 mov 30(%rsi), %r10b /* A */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
391 mov 48(%rsi), %edi /* target_cycle */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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parents:
diff changeset
392 mov 52(%rsi), %ebp /* current_cycle */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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parents:
diff changeset
393 mov 64(%rsi), %r11 /* z80 RAM */
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Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
394 mov 72(%rsi), %r12 /* cartridge bank pointer */
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
395 ret
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
396
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parents:
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397 .global z80_run
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parents:
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398 z80_run:
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parents:
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399 push %rbx
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parents:
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400 push %rbp
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parents:
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401 push %r12
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parents:
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402 push %r13
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Mike Pavone <pavone@retrodev.com>
parents:
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403 push %r14
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
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parents:
diff changeset
404 push %r15
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Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
405 mov %rdi, %rsi
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Mike Pavone <pavone@retrodev.com>
parents:
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406 call z80_load_context_scratch
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Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
407 cmpq $0, 104(%rsi)
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Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
408 je no_extra
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Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
409 push 104(%rsi)
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Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
410 movq $0, 104(%rsi)
d94e6cd5a8a5 Forgot to commit zruntime a while back, adding it now.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
411 no_extra:
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Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
412 jmp *(%rsi)
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 393
diff changeset
413