Mercurial > repos > blastem

annotate dis.c @ 110:a575808dd90b

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Implement more address modes for jsr
author Mike Pavone <pavone@retrodev.com>
date Fri, 28 Dec 2012 15:16:36 -0800
parents a71544cd01ea
children 8b50d2c975b2
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
2
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1 #include "68kinst.h"
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2 #include <stdio.h>
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3 #include <stdlib.h>
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
5 uint8_t visited[(16*1024*1024)/16];
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
6
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
7 void visit(uint32_t address)
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
8 {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
9 address &= 0xFFFFFF;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
10 visited[address/16] |= 1 << ((address / 2) % 8);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
11 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
12
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
13 uint8_t is_visited(uint32_t address)
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
14 {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
15 address &= 0xFFFFFF;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
16 return visited[address/16] & (1 << ((address / 2) % 8));
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
17 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
18
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
19 typedef struct deferred {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
20 uint32_t address;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
21 struct deferred *next;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
22 } deferred;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
23
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
24 deferred * defer(uint32_t address, deferred * next)
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
25 {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
26 if (is_visited(address)) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
27 return next;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
28 }
103
a71544cd01ea Don't pre-emptively translate code at interrupt vectors as some PD ROMs have these pointing at junk. Need some kind of heuristic for detecting garbage if I'm going to translate them ahead of time by default.
Mike Pavone <pavone@retrodev.com>
parents: 80
diff changeset
29 printf("deferring %X\n", address);
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
30 deferred * d = malloc(sizeof(deferred));
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
31 d->address = address;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
32 d->next = next;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
33 return d;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
34 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
35
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
36 #define SIMPLE 0
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
37
2
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
38 int main(int argc, char ** argv)
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
39 {
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
40 long filesize;
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
41 unsigned short *filebuf;
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
42 char disbuf[1024];
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
43 m68kinst instbuf;
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
44 unsigned short * cur;
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
45 FILE * f = fopen(argv[1], "rb");
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
46 fseek(f, 0, SEEK_END);
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
47 filesize = ftell(f);
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
48 fseek(f, 0, SEEK_SET);
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
49 filebuf = malloc(filesize);
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
50 fread(filebuf, 2, filesize/2, f);
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
51 fclose(f);
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
52 for(cur = filebuf; cur - filebuf < (filesize/2); ++cur)
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
53 {
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
54 *cur = (*cur >> 8) | (*cur << 8);
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
55 }
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
56 uint32_t address = filebuf[2] << 16 | filebuf[3], tmp_addr;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
57 #if !SIMPLE
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
58 uint16_t *encoded, *next;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
59 uint32_t size;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
60 deferred *def = NULL, *tmpd;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
61 def = defer(address, def);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
62 def = defer(filebuf[0x68/2] << 16 | filebuf[0x6A/2], def);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
63 def = defer(filebuf[0x70/2] << 16 | filebuf[0x72/2], def);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
64 def = defer(filebuf[0x78/2] << 16 | filebuf[0x7A/2], def);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
65 while(def) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
66 do {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
67 encoded = NULL;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
68 address = def->address;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
69 if (!is_visited(address)) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
70 encoded = filebuf + address/2;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
71 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
72 tmpd = def;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
73 def = def->next;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
74 free(tmpd);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
75 } while(def && encoded == NULL);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
76 if (!encoded) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
77 break;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
78 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
79 for(;;) {
48
0bdda50c7364 Don't try to disassemble addresses beyond the end of the cartridge
Mike Pavone <pavone@retrodev.com>
parents: 47
diff changeset
80 if (address > filesize) {
0bdda50c7364 Don't try to disassemble addresses beyond the end of the cartridge
Mike Pavone <pavone@retrodev.com>
parents: 47
diff changeset
81 break;
0bdda50c7364 Don't try to disassemble addresses beyond the end of the cartridge
Mike Pavone <pavone@retrodev.com>
parents: 47
diff changeset
82 }
47
4b6c667326a1 Fix bug in address visitation in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 44
diff changeset
83 visit(address);
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
84 next = m68k_decode(encoded, &instbuf, address);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
85 address += (next-encoded)*2;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
86 encoded = next;
103
a71544cd01ea Don't pre-emptively translate code at interrupt vectors as some PD ROMs have these pointing at junk. Need some kind of heuristic for detecting garbage if I'm going to translate them ahead of time by default.
Mike Pavone <pavone@retrodev.com>
parents: 80
diff changeset
87 m68k_disasm(&instbuf, disbuf);
a71544cd01ea Don't pre-emptively translate code at interrupt vectors as some PD ROMs have these pointing at junk. Need some kind of heuristic for detecting garbage if I'm going to translate them ahead of time by default.
Mike Pavone <pavone@retrodev.com>
parents: 80
diff changeset
88 printf("%X: %s\n", instbuf.address, disbuf);
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
89 if (instbuf.op == M68K_ILLEGAL || instbuf.op == M68K_RTS || instbuf.op == M68K_RTE) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
90 break;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
91 } else if (instbuf.op == M68K_BCC || instbuf.op == M68K_DBCC || instbuf.op == M68K_BSR) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
92 if (instbuf.op == M68K_BCC && instbuf.extra.cond == COND_TRUE) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
93 address = instbuf.address + 2 + instbuf.src.params.immed;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
94 encoded = filebuf + address/2;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
95 if (is_visited(address)) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
96 break;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
97 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
98 } else {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
99 tmp_addr = instbuf.address + 2 + instbuf.src.params.immed;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
100 def = defer(tmp_addr, def);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
101 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
102 } else if(instbuf.op == M68K_JMP) {
80
7b1e16e981ef Fix bug in disassembler that caused it to disassemble addresses it shouldn't
Mike Pavone <pavone@retrodev.com>
parents: 48
diff changeset
103 if (instbuf.src.addr_mode == MODE_ABSOLUTE || instbuf.src.addr_mode == MODE_ABSOLUTE_SHORT) {
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
104 address = instbuf.src.params.immed;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
105 encoded = filebuf + address/2;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
106 if (is_visited(address)) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
107 break;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
108 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
109 } else {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
110 break;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
111 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
112 } else if(instbuf.op == M68K_JSR) {
80
7b1e16e981ef Fix bug in disassembler that caused it to disassemble addresses it shouldn't
Mike Pavone <pavone@retrodev.com>
parents: 48
diff changeset
113 if (instbuf.src.addr_mode == MODE_ABSOLUTE || instbuf.src.addr_mode == MODE_ABSOLUTE_SHORT) {
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
114 def = defer(instbuf.src.params.immed, def);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
115 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
116 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
117 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
118 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
119 for (address = 0; address < filesize; address+=2) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
120 if (is_visited(address)) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
121 encoded = filebuf + address/2;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
122 m68k_decode(encoded, &instbuf, address);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
123 m68k_disasm(&instbuf, disbuf);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
124 printf("%X: %s\n", instbuf.address, disbuf);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
125 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
126 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
127 #else
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
128 for(cur = filebuf + 0x100; (cur - filebuf) < (filesize/2); )
2
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
129 {
13
168b1a873895 Improve disassembly. FIx some decoding bugs.
Mike Pavone <pavone@retrodev.com>
parents: 8
diff changeset
130 unsigned short * start = cur;
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 13
diff changeset
131 cur = m68k_decode(cur, &instbuf, (start - filebuf)*2);
2
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
132 m68k_disasm(&instbuf, disbuf);
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 13
diff changeset
133 printf("%X: %s\n", instbuf.address, disbuf);
2
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
134 }
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
135 #endif
2
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
136 return 0;
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
137 }