repos/blastem: gen_x86.c annotate

annotate gen_x86.c @ 27:aa1c47fab3f1

Fix sprite transparency for overlapping sprites

author	Mike Pavone <pavone@retrodev.com>
date	Sat, 08 Dec 2012 16:58:11 -0800
parents	3e7bfde7606e
children	d2e43d64e999

rev	line source
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	1 #include "gen_x86.h"
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	2 #include "68kinst.h"
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	3 #include <stddef.h>
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	4 #include <stdio.h>
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	5
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	6 #define REX_RM_FIELD 0x1
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	7 #define REX_SIB_FIELD 0x2
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	8 #define REX_REG_FIELD 0x4
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	9 #define REX_QUAD 0x8
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	10
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	11 #define OP_ADD 0x00
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	12 #define OP_OR 0x08
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	13 #define PRE_2BYTE 0x0F
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	14 #define OP_ADC 0x10
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	15 #define OP_SBB 0x18
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	16 #define OP_AND 0x20
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	17 #define OP_SUB 0x28
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	18 #define OP_XOR 0x30
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	19 #define OP_CMP 0x38
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	20 #define PRE_REX 0x40
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	21 #define OP_PUSH 0x50
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	22 #define OP_POP 0x58
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	23 #define PRE_SIZE 0x66
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	24 #define OP_JCC 0x70
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	25 #define OP_IMMED_ARITH 0x80
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	26 #define OP_MOV 0x88
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	27 #define OP_PUSHF 0x9C
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	28 #define OP_POPF 0x9D
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	29 #define OP_MOV_I8R 0xB0
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	30 #define OP_MOV_IR 0xB8
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	31 #define OP_RETN 0xC3
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	32 #define OP_MOV_IEA 0xC6
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	33 #define OP_CALL 0xE8
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	34 #define OP_JMP 0xE9
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	35 #define OP_JMP_BYTE 0xEB
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	36 #define OP_CALL_EA 0xFF
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	37
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	38 #define OP2_JCC 0x80
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	39 #define OP2_SETCC 0x90
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	40
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	41 #define OP_EX_ADDI 0x0
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	42 #define OP_EX_ORI 0x1
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	43 #define OP_EX_ADCI 0x2
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	44 #define OP_EX_SBBI 0x3
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	45 #define OP_EX_ANDI 0x4
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	46 #define OP_EX_SUBI 0x5
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	47 #define OP_EX_XORI 0x6
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	48 #define OP_EX_CMPI 0x7
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	49
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	50 #define BIT_IMMED_RAX 0x4
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	51 #define BIT_DIR 0x2
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	52 #define BIT_SIZE 0x1
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	53
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	54
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	55 enum {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	56 X86_RAX = 0,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	57 X86_RCX,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	58 X86_RDX,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	59 X86_RBX,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	60 X86_RSP,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	61 X86_RBP,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	62 X86_RSI,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	63 X86_RDI,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	64 X86_AH=4,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	65 X86_CH,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	66 X86_DH,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	67 X86_BH,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	68 X86_R8=0,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	69 X86_R9,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	70 X86_R10,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	71 X86_R11,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	72 X86_R12,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	73 X86_R13,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	74 X86_R14,
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	75 X86_R15
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	76 } x86_regs_enc;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	77
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	78 uint8_t * x86_rr_sizedir(uint8_t * out, uint8_t opcode, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	79 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	80 //TODO: Deal with the fact that AH, BH, CH and DH can only be in the R/M param when there's a REX prefix
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	81 uint8_t tmp;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	82 if (size == SZ_W) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	83 *(out++) = PRE_SIZE;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	84 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	85 if (size == SZ_B && dst >= RSP && dst <= RDI) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	86 opcode \|= BIT_DIR;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	87 tmp = dst;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	88 dst = src;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	89 src = dst;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	90 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	91 if (size == SZ_Q \|\| src >= R8 \|\| dst >= R8 \|\| (size == SZ_B && src >= RSP && src <= RDI)) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	92 *out = PRE_REX;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	93 if (size == SZ_Q) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	94 *out \|= REX_QUAD;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	95 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	96 if (src >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	97 *out \|= REX_REG_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	98 src -= (R8 - X86_R8);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	99 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	100 if (dst >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	101 *out \|= REX_RM_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	102 dst -= (R8 - X86_R8);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	103 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	104 out++;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	105 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	106 if (size == SZ_B) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	107 if (src >= AH && src <= BH) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	108 src -= (AH-X86_AH);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	109 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	110 if (dst >= AH && dst <= BH) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	111 dst -= (AH-X86_AH);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	112 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	113 } else {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	114 opcode \|= BIT_SIZE;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	115 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	116 *(out++) = opcode;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	117 *(out++) = MODE_REG_DIRECT \| dst \| (src << 3);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	118 return out;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	119 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	120
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	121 uint8_t * x86_rrdisp8_sizedir(uint8_t * out, uint8_t opcode, uint8_t reg, uint8_t base, int8_t disp, uint8_t size, uint8_t dir)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	122 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	123 //TODO: Deal with the fact that AH, BH, CH and DH can only be in the R/M param when there's a REX prefix
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	124 uint8_t tmp;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	125 if (size == SZ_W) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	126 *(out++) = PRE_SIZE;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	127 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	128 if (size == SZ_Q \|\| reg >= R8 \|\| base >= R8 \|\| (size == SZ_B && reg >= RSP && reg <= RDI)) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	129 *out = PRE_REX;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	130 if (size == SZ_Q) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	131 *out \|= REX_QUAD;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	132 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	133 if (reg >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	134 *out \|= REX_REG_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	135 reg -= (R8 - X86_R8);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	136 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	137 if (base >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	138 *out \|= REX_RM_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	139 base -= (R8 - X86_R8);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	140 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	141 out++;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	142 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	143 if (size == SZ_B) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	144 if (reg >= AH && reg <= BH) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	145 reg -= (AH-X86_AH);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	146 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	147 } else {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	148 opcode \|= BIT_SIZE;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	149 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	150 *(out++) = opcode \| dir;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	151 *(out++) = MODE_REG_DISPLACE8 \| base \| (reg << 3);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	152 if (base == RSP) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	153 //add SIB byte, with no index and RSP as base
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	154 *(out++) = (RSP << 3) \| RSP;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	155 }
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	156 *(out++) = disp;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	157 return out;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	158 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	159
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	160 uint8_t * x86_rrind_sizedir(uint8_t * out, uint8_t opcode, uint8_t reg, uint8_t base, uint8_t size, uint8_t dir)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	161 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	162 //TODO: Deal with the fact that AH, BH, CH and DH can only be in the R/M param when there's a REX prefix
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	163 uint8_t tmp;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	164 if (size == SZ_W) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	165 *(out++) = PRE_SIZE;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	166 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	167 if (size == SZ_Q \|\| reg >= R8 \|\| base >= R8 \|\| (size == SZ_B && reg >= RSP && reg <= RDI)) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	168 *out = PRE_REX;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	169 if (size == SZ_Q) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	170 *out \|= REX_QUAD;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	171 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	172 if (reg >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	173 *out \|= REX_REG_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	174 reg -= (R8 - X86_R8);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	175 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	176 if (base >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	177 *out \|= REX_RM_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	178 base -= (R8 - X86_R8);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	179 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	180 out++;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	181 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	182 if (size == SZ_B) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	183 if (reg >= AH && reg <= BH) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	184 reg -= (AH-X86_AH);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	185 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	186 } else {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	187 opcode \|= BIT_SIZE;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	188 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	189 *(out++) = opcode \| dir;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	190 *(out++) = MODE_REG_INDIRECT \| base \| (reg << 3);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	191 if (base == RSP) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	192 //add SIB byte, with no index and RSP as base
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	193 *(out++) = (RSP << 3) \| RSP;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	194 }
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	195 return out;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	196 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	197
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	198 uint8_t * x86_ir(uint8_t * out, uint8_t opcode, uint8_t op_ex, uint8_t al_opcode, int32_t val, uint8_t dst, uint8_t size)
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	199 {
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	200 uint8_t sign_extend = 0;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	201 if ((size == SZ_D \|\| size == SZ_Q) && val <= 0x7F && val >= -0x80) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	202 sign_extend = 1;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	203 opcode \|= BIT_DIR;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	204 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	205 if (size == SZ_W) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	206 *(out++) = PRE_SIZE;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	207 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	208 if (dst == RAX && !sign_extend) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	209 if (size != SZ_B) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	210 al_opcode \|= BIT_SIZE;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	211 if (size == SZ_Q) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	212 *out = PRE_REX \| REX_QUAD;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	213 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	214 }
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	215 *(out++) = al_opcode \| BIT_IMMED_RAX;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	216 } else {
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	217 if (size == SZ_Q \|\| dst >= R8 \|\| (size == SZ_B && dst >= RSP && dst <= RDI)) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	218 *out = PRE_REX;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	219 if (size == SZ_Q) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	220 *out \|= REX_QUAD;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	221 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	222 if (dst >= R8) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	223 *out \|= REX_RM_FIELD;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	224 dst -= (R8 - X86_R8);
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	225 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	226 out++;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	227 }
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	228 if (dst >= AH && dst <= BH) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	229 dst -= (AH-X86_AH);
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	230 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	231 if (size != SZ_B) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	232 opcode \|= BIT_SIZE;
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	233 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	234 *(out++) = opcode;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	235 *(out++) = MODE_REG_DIRECT \| dst \| (op_ex << 3);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	236 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	237 *(out++) = val;
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	238 if (size != SZ_B && !sign_extend) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	239 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	240 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	241 if (size != SZ_W) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	242 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	243 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	244 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	245 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	246 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	247 }
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	248 return out;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	249 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	250
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	251 uint8_t * x86_irdisp8(uint8_t * out, uint8_t opcode, uint8_t op_ex, int32_t val, uint8_t dst, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	252 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	253 uint8_t sign_extend = 0;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	254 if ((size == SZ_D \|\| size == SZ_Q) && val <= 0x7F && val >= -0x80) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	255 sign_extend = 1;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	256 opcode \|= BIT_DIR;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	257 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	258 if (size == SZ_W) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	259 *(out++) = PRE_SIZE;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	260 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	261
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	262 if (size == SZ_Q \|\| dst >= R8 \|\| (size == SZ_B && dst >= RSP && dst <= RDI)) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	263 *out = PRE_REX;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	264 if (size == SZ_Q) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	265 *out \|= REX_QUAD;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	266 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	267 if (dst >= R8) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	268 *out \|= REX_RM_FIELD;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	269 dst -= (R8 - X86_R8);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	270 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	271 out++;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	272 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	273 if (dst >= AH && dst <= BH) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	274 dst -= (AH-X86_AH);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	275 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	276 if (size != SZ_B) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	277 opcode \|= BIT_SIZE;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	278 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	279 *(out++) = opcode;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	280 *(out++) = MODE_REG_DISPLACE8 \| dst \| (op_ex << 3);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	281 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	282 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	283 if (size != SZ_B && !sign_extend) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	284 val >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	285 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	286 if (size != SZ_W) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	287 val >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	288 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	289 val >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	290 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	291 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	292 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	293 return out;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	294 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	295
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	296
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	297 uint8_t * add_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	298 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	299 return x86_rr_sizedir(out, OP_ADD, src, dst, size);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	300 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	301
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	302 uint8_t * add_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size)
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	303 {
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	304 return x86_ir(out, OP_IMMED_ARITH, OP_EX_ADDI, OP_ADD, val, dst, size);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	305 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	306
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	307 uint8_t * add_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	308 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	309 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_ADDI, val, dst_base, disp, size);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	310 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	311
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	312 uint8_t * add_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	313 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	314 return x86_rrdisp8_sizedir(out, OP_ADD, src, dst_base, disp, size, 0);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	315 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	316
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	317 uint8_t * add_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	318 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	319 return x86_rrdisp8_sizedir(out, OP_ADD, dst, src_base, disp, size, BIT_DIR);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	320 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	321
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	322 uint8_t * or_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	323 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	324 return x86_rr_sizedir(out, OP_OR, src, dst, size);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	325 }
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	326 uint8_t * or_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size)
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	327 {
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	328 return x86_ir(out, OP_IMMED_ARITH, OP_EX_ORI, OP_OR, val, dst, size);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	329 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	330
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	331 uint8_t * or_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	332 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	333 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_ORI, val, dst_base, disp, size);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	334 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	335
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	336 uint8_t * or_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	337 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	338 return x86_rrdisp8_sizedir(out, OP_OR, src, dst_base, disp, size, 0);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	339 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	340
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	341 uint8_t * or_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	342 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	343 return x86_rrdisp8_sizedir(out, OP_OR, dst, src_base, disp, size, BIT_DIR);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	344 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	345
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	346 uint8_t * and_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	347 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	348 return x86_rr_sizedir(out, OP_AND, src, dst, size);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	349 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	350
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	351 uint8_t * and_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size)
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	352 {
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	353 return x86_ir(out, OP_IMMED_ARITH, OP_EX_ANDI, OP_AND, val, dst, size);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	354 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	355
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	356 uint8_t * and_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	357 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	358 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_ANDI, val, dst_base, disp, size);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	359 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	360
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	361 uint8_t * and_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	362 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	363 return x86_rrdisp8_sizedir(out, OP_AND, src, dst_base, disp, size, 0);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	364 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	365
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	366 uint8_t * and_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	367 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	368 return x86_rrdisp8_sizedir(out, OP_AND, dst, src_base, disp, size, BIT_DIR);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	369 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	370
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	371 uint8_t * xor_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	372 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	373 return x86_rr_sizedir(out, OP_XOR, src, dst, size);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	374 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	375
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	376 uint8_t * xor_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size)
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	377 {
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	378 return x86_ir(out, OP_IMMED_ARITH, OP_EX_XORI, OP_XOR, val, dst, size);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	379 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	380
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	381 uint8_t * xor_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	382 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	383 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_XORI, val, dst_base, disp, size);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	384 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	385
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	386 uint8_t * xor_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	387 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	388 return x86_rrdisp8_sizedir(out, OP_XOR, src, dst_base, disp, size, 0);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	389 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	390
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	391 uint8_t * xor_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	392 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	393 return x86_rrdisp8_sizedir(out, OP_XOR, dst, src_base, disp, size, BIT_DIR);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	394 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	395
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	396 uint8_t * sub_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	397 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	398 return x86_rr_sizedir(out, OP_SUB, src, dst, size);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	399 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	400
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	401 uint8_t * sub_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size)
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	402 {
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	403 return x86_ir(out, OP_IMMED_ARITH, OP_EX_SUBI, OP_SUB, val, dst, size);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	404 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	405
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	406 uint8_t * sub_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	407 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	408 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_SUBI, val, dst_base, disp, size);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	409 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	410
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	411 uint8_t * sub_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	412 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	413 return x86_rrdisp8_sizedir(out, OP_SUB, src, dst_base, disp, size, 0);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	414 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	415
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	416 uint8_t * sub_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	417 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	418 return x86_rrdisp8_sizedir(out, OP_SUB, dst, src_base, disp, size, BIT_DIR);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	419 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	420
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	421 uint8_t * cmp_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	422 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	423 return x86_rr_sizedir(out, OP_CMP, src, dst, size);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	424 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	425
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	426 uint8_t * cmp_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size)
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	427 {
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	428 return x86_ir(out, OP_IMMED_ARITH, OP_EX_CMPI, OP_CMP, val, dst, size);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	429 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	430
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	431 uint8_t * cmp_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	432 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	433 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_CMPI, val, dst_base, disp, size);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	434 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	435
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	436 uint8_t * cmp_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	437 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	438 return x86_rrdisp8_sizedir(out, OP_CMP, src, dst_base, disp, size, 0);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	439 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	440
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	441 uint8_t * cmp_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	442 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	443 return x86_rrdisp8_sizedir(out, OP_CMP, dst, src_base, disp, size, BIT_DIR);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	444 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	445
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	446 uint8_t * mov_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	447 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	448 return x86_rr_sizedir(out, OP_MOV, src, dst, size);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	449 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	450
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	451 uint8_t * mov_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	452 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	453 return x86_rrdisp8_sizedir(out, OP_MOV, src, dst_base, disp, size, 0);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	454 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	455
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	456 uint8_t * mov_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	457 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	458 return x86_rrdisp8_sizedir(out, OP_MOV, dst, src_base, disp, size, BIT_DIR);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	459 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	460
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	461 uint8_t * mov_rrind(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	462 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	463 return x86_rrind_sizedir(out, OP_MOV, src, dst, size, 0);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	464 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	465
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	466 uint8_t * mov_rindr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	467 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	468 return x86_rrind_sizedir(out, OP_MOV, dst, src, size, BIT_DIR);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	469 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	470
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	471 uint8_t * mov_ir(uint8_t * out, int64_t val, uint8_t dst, uint8_t size)
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	472 {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	473 uint8_t sign_extend = 0;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	474 if (size == SZ_Q && val <= 0x7FFFFFFF && val >= -2147483648) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	475 sign_extend = 1;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	476 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	477 if (size == SZ_W) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	478 *(out++) = PRE_SIZE;
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	479 }
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	480 if (size == SZ_Q \|\| dst >= R8 \|\| (size == SZ_B && dst >= RSP && dst <= RDI)) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	481 *out = PRE_REX;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	482 if (size == SZ_Q) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	483 *out \|= REX_QUAD;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	484 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	485 if (dst >= R8) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	486 *out \|= REX_RM_FIELD;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	487 dst -= (R8 - X86_R8);
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	488 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	489 out++;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	490 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	491 if (dst >= AH && dst <= BH) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	492 dst -= (AH-X86_AH);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	493 }
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	494 if (size == SZ_B) {
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	495 *(out++) = OP_MOV_I8R \| dst;
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	496 } else if (size == SZ_Q && sign_extend) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	497 *(out++) = OP_MOV_IEA \| BIT_SIZE;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	498 *(out++) = MODE_REG_DIRECT \| dst;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	499 } else {
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	500 *(out++) = OP_MOV_IR \| dst;
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	501 }
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	502 *(out++) = val;
15 c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	503 if (size != SZ_B) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	504 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	505 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	506 if (size != SZ_W) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	507 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	508 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	509 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	510 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	511 if (size == SZ_Q && !sign_extend) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	512 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	513 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	514 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	515 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	516 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	517 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	518 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	519 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	520 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters. Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	521 }
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	522 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	523 return out;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	524 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	525
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	526 uint8_t * mov_irdisp8(uint8_t * out, int32_t val, uint8_t dst, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	527 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	528 if (size == SZ_W) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	529 *(out++) = PRE_SIZE;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	530 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	531 if (size == SZ_Q \|\| dst >= R8 \|\| (size == SZ_B && dst >= RSP && dst <= RDI)) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	532 *out = PRE_REX;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	533 if (size == SZ_Q) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	534 *out \|= REX_QUAD;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	535 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	536 if (dst >= R8) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	537 *out \|= REX_RM_FIELD;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	538 dst -= (R8 - X86_R8);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	539 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	540 out++;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	541 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	542 if (dst >= AH && dst <= BH) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	543 dst -= (AH-X86_AH);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	544 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	545 *(out++) = OP_MOV_IEA \| (size == SZ_B ? 0 : BIT_SIZE);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	546 *(out++) = MODE_REG_DISPLACE8 \| dst;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	547 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	548
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	549 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	550 if (size != SZ_B) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	551 val >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	552 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	553 if (size != SZ_W) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	554 val >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	555 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	556 val >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	557 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	558 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	559 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	560 return out;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	561 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	562
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	563 uint8_t * pushf(uint8_t * out)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	564 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	565 *(out++) = OP_PUSHF;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	566 return out;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	567 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	568
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	569 uint8_t * popf(uint8_t * out)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	570 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	571 *(out++) = OP_POPF;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	572 return out;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	573 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	574
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	575 uint8_t * push_r(uint8_t * out, uint8_t reg)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	576 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	577 if (reg >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	578 *(out++) = PRE_REX \| REX_RM_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	579 reg -= R8 - X86_R8;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	580 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	581 *(out++) = OP_PUSH \| reg;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	582 return out;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	583 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	584
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	585 uint8_t * pop_r(uint8_t * out, uint8_t reg)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	586 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	587 if (reg >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	588 *(out++) = PRE_REX \| REX_RM_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	589 reg -= R8 - X86_R8;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	590 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	591 *(out++) = OP_POP \| reg;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	592 return out;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	593 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	594
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	595 uint8_t * setcc_r(uint8_t * out, uint8_t cc, uint8_t dst)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	596 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	597 if (dst >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	598 *(out++) = PRE_REX \| REX_RM_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	599 dst -= R8 - X86_R8;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	600 } else if (dst >= RSP && dst <= RDI) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	601 *(out++) = PRE_REX;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	602 } else if (dst >= AH && dst <= BH) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	603 dst -= AH - X86_AH;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	604 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	605 *(out++) = PRE_2BYTE;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	606 *(out++) = OP2_SETCC \| cc;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	607 *(out++) = MODE_REG_DIRECT \| dst;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	608 return out;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	609 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	610
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	611 uint8_t * setcc_rind(uint8_t * out, uint8_t cc, uint8_t dst)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	612 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	613 if (dst >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	614 *(out++) = PRE_REX \| REX_RM_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	615 dst -= R8 - X86_R8;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	616 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	617 *(out++) = PRE_2BYTE;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	618 *(out++) = OP2_SETCC \| cc;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	619 *(out++) = MODE_REG_INDIRECT \| dst;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	620 return out;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	621 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	622
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	623 uint8_t * jcc(uint8_t * out, uint8_t cc, uint8_t * dest)
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	624 {
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	625 ptrdiff_t disp = dest-(out+2);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	626 if (disp <= 0x7F && disp >= -0x80) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	627 *(out++) = OP_JCC \| cc;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	628 *(out++) = disp;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	629 } else {
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	630 disp = dest-(out+6);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	631 if (disp <= 0x7FFFFFFF && disp >= -2147483648) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	632 *(out++) = PRE_2BYTE;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	633 *(out++) = OP2_JCC \| cc;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	634 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	635 disp >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	636 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	637 disp >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	638 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	639 disp >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	640 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	641 } else {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	642 printf("%p - %p = %lX\n", dest, out + 6, disp);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	643 return NULL;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	644 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	645 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	646 return out;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	647 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	648
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	649 uint8_t * jmp(uint8_t * out, uint8_t * dest)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	650 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	651 ptrdiff_t disp = dest-(out+2);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	652 if (disp <= 0x7F && disp >= -0x80) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	653 *(out++) = OP_JMP_BYTE;
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	654 *(out++) = disp;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	655 } else {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	656 disp = dest-(out+5);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	657 if (disp <= 0x7FFFFFFF && disp >= -2147483648) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	658 *(out++) = OP_JMP;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	659 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	660 disp >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	661 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	662 disp >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	663 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	664 disp >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	665 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	666 } else {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	667 printf("%p - %p = %lX\n", dest, out + 6, disp);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	668 return NULL;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	669 }
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	670 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	671 return out;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	672 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	673
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	674 uint8_t * call(uint8_t * out, uint8_t * fun)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	675 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	676 ptrdiff_t disp = fun-(out+5);
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	677 if (disp <= 0x7FFFFFFF && disp >= -2147483648) {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	678 *(out++) = OP_CALL;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	679 *(out++) = disp;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	680 disp >>= 8;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	681 *(out++) = disp;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	682 disp >>= 8;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	683 *(out++) = disp;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	684 disp >>= 8;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	685 *(out++) = disp;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	686 } else {
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	687 //TODO: Implement far call???
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 15 diff changeset	688 printf("%p - %p = %lX\n", fun, out + 5, disp);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	689 return NULL;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	690 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	691 return out;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	692 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	693
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	694 uint8_t * retn(uint8_t * out)
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	695 {
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	696 *(out++) = OP_RETN;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	697 return out;
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	698 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	699
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	700

Mercurial > repos > blastem

annotate gen_x86.c @ 27:aa1c47fab3f1