Mercurial > repos > blastem
annotate z80_to_x86.c @ 217:acd29e2664c6
Added testcases file. Some fixes to test generator for dealing with indexed mode with base and index reg the same. Added support for blastem headless mode in test runner.
author | Mike Pavone <pavone@retrodev.com> |
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date | Sat, 20 Apr 2013 00:29:14 -0700 |
parents | 4d4559b04c59 |
children | d9bf8e61c33c |
rev | line source |
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213
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1 #include "z80_to_x86.h" |
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2 #include "gen_x86.h" |
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3 |
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4 #define MODE_UNUSED (MODE_IMMED-1) |
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5 |
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6 #define ZCYCLES RBP |
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7 #define SCRATCH1 R13 |
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8 #define SCRATCH2 R14 |
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9 |
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10 void z80_read_byte(); |
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11 void z80_read_word(); |
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12 |
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13 uint8_t z80_size(z80_inst * inst) |
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14 { |
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15 uint8_t reg = (inst->reg & 0x1F); |
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16 if (reg != Z80_UNUSED &&) { |
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17 return reg < Z80_BC ? SZ_B : SZ_W; |
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18 } |
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19 //TODO: Handle any necessary special cases |
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20 return SZ_B; |
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21 } |
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22 |
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23 uint8_t * zcylces(dst, uint32_t num_cycles) |
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24 { |
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25 return add_ir(dst, num_cycles, ZCYCLES, SZ_D); |
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26 } |
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27 |
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28 uint8_t * translate_z80_reg(z80_inst * inst, x86_ea * ea, uint8_t * dst, x86_z80_options * opts) |
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29 { |
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30 if (inst->reg == Z80_USE_IMMED) { |
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31 ea->mode = MODE_IMMED; |
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32 ea->disp = inst->immed; |
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33 } else if ((inst->reg & 0x1F) == Z80_UNUSED) { |
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34 ea->mode = MODE_UNUSED; |
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35 } else { |
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36 ea->mode = MODE_REG; |
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37 if (inst->reg == Z80_IYH) { |
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38 ea->base = opts->regs[Z80_IYL]; |
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39 dst = ror_ir(dst, 8, opts->regs[Z80_IY], SZ_W); |
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40 } else { |
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41 ea->base = opts->regs[inst->reg] |
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42 } |
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43 } |
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44 return dst; |
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45 } |
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46 |
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47 uint8_t * save_z80_reg(uint8_t * dst, z80_inst * inst, x86_z80_options * opts) |
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48 { |
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49 if (inst->reg == Z80_IYH) { |
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50 dst = ror_ir(dst, 8, opts->regs[Z80_IY], SZ_W); |
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51 } |
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52 return dst; |
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53 } |
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54 |
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55 uint8_t * translate_z80_ea(z80_inst * inst, x86_ea * ea, uint8_t * dst, x86_z80_options * opts, uint8_t read, uint8_t modify) |
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56 { |
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57 uint8_t size, reg, areg; |
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58 ea->mode = MODE_REG; |
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59 areg = read ? SCRATCH1 : SCRATCH2; |
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60 switch(inst->addr_mode & 0x1F) |
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61 { |
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62 case Z80_REG: |
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63 if (inst->ea_reg == Z80_IYH) { |
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64 ea->base = opts->regs[Z80_IYL]; |
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65 dst = ror_ir(dst, 8, opts->regs[Z80_IY], SZ_W); |
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66 } else { |
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67 ea->base = opts->regs[inst->ea_reg]; |
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68 } |
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69 break; |
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70 case Z80_REG_INDIRECT: |
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71 dst = mov_rr(dst, opts->regs[inst->ea_reg], areg, SZ_W); |
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72 size = z80_size(inst); |
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73 if (read) { |
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74 if (modify) { |
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75 dst = push_r(dst, SCRATCH1); |
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76 } |
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77 if (size == SZ_B) { |
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78 dst = call(dst, (uint8_t *)z80_read_byte); |
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79 } else { |
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80 dst = call(dst, (uint8_t *)z80_read_word); |
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81 } |
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82 if (modify) { |
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83 dst = pop_r(dst, SCRATCH2); |
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84 } |
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85 } |
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86 ea->base = SCRATCH1; |
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87 break; |
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88 case Z80_IMMED: |
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89 ea->mode = MODE_IMMED; |
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90 ea->disp = inst->immed; |
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91 break; |
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92 case Z80_IMMED_INDIRECT: |
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93 dst = mov_ir(dst, inst->immed, areg, SZ_W); |
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94 size = z80_size(inst); |
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95 if (read) { |
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96 if (modify) { |
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97 dst = push_r(dst, SCRATCH1); |
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98 } |
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99 if (size == SZ_B) { |
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100 dst = call(dst, (uint8_t *)z80_read_byte); |
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101 } else { |
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102 dst = call(dst, (uint8_t *)z80_read_word); |
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103 } |
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104 if (modify) { |
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105 dst = pop_r(dst, SCRATCH2); |
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106 } |
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107 } |
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108 ea->base = SCRATCH1; |
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109 break; |
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110 case Z80_IX_INDEXED: |
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111 case Z80_IY_INDEXED: |
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112 reg = opts->regs[inst->addr_mode == Z80_IX_INDEXED ? Z80_IX : Z80_IY]; |
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113 dst = mov_rr(dst, reg, areg, SZ_W); |
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114 dst = add_ir(dst, inst->immed, areg, SZ_W); |
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115 size = z80_size(inst); |
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116 if (read) { |
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117 if (modify) { |
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118 dst = push_r(dst, SCRATCH1); |
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119 } |
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120 if (size == SZ_B) { |
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121 dst = call(dst, (uint8_t *)z80_read_byte); |
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122 } else { |
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123 dst = call(dst, (uint8_t *)z80_read_word); |
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124 } |
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125 if (modify) { |
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126 dst = pop_r(dst, SCRATCH2); |
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127 } |
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128 } |
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129 break; |
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130 case Z80_UNUSED: |
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131 ea->mode = MODE_UNUSED: |
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132 break; |
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133 default: |
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134 fprintf(stderr, "Unrecognized Z80 addressing mode %d\n", inst->addr_mode); |
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135 exit(1); |
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136 } |
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137 return dst; |
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138 } |
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139 |
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140 uint8_t * z80_save_ea(uint8_t * dst, z80_inst * inst, x86_z80_options * opts) |
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141 { |
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142 if (inst->addr_mode == Z80_REG_DIRECT && inst->ea_reg == Z80_IYH) { |
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143 dst = ror_ir(dst, 8, opts->regs[Z80_IY], SZ_W); |
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144 } |
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145 return dst; |
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146 } |
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147 |
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148 uint8_t * z80_save_result(uint8_t * dst, z80_inst * inst) |
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149 { |
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150 if (z80_size(inst). == SZ_B) { |
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151 dst = call(dst, (uint8_t *)z80_write_byte); |
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152 } else { |
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153 dst = call(dst, (uint8_t *)z80_write_word); |
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154 } |
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155 return dst; |
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156 } |
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157 |
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158 enum { |
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159 DONT_READ=0, |
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160 READ |
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161 }; |
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162 |
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163 enum { |
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164 DONT_MODIFY=0, |
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165 MODIFY |
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166 }; |
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167 |
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168 uint8_t zf_off(uint8_t flag) |
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169 { |
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170 return offsetof(z80_context, flags) + flag; |
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171 } |
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172 |
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173 uint8_t * translate_z80_inst(z80_inst * inst, uint8_t * dst, x86_z80_options * opts) |
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174 { |
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175 uint32_t cycles; |
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176 x86_ea src_op, dst_op; |
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177 switch(inst->op) |
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178 { |
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179 case Z80_LD: |
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180 if (inst->addr_mode & Z80_DIR) { |
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181 dst = translate_z80_ea(inst, &src_op, dst, opts, READ, DONT_MODIFY); |
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182 dst = translate_z80_reg(inst, &dst_op, dst, opts); |
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183 } else { |
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184 dst = translate_z80_reg(inst, &src_op, dst, opts); |
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185 dst = translate_z80_ea(inst, &dst_op, dst, opts, DONT_READ, MODIFY); |
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186 } |
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187 if (ea_op.mode == MODE_REG_DIRECT) { |
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188 dst = mov_rr(dst, ea_op.base, reg_op.base, z80_size(inst)); |
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189 } else { |
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190 dst = mov_ir(dst, ea_op.disp, reg_op.base, z80_size(inst)); |
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191 } |
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192 dst = z80_save_reg(dst, inst, opts); |
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193 dst = z80_save_ea(dst, inst, opts); |
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194 if (!(inst->addr_mode & Z80_DIR)) { |
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195 dst = z80_save_result(dst, inst, opts); |
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196 } |
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197 break; |
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198 case Z80_PUSH: |
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199 dst = zcycles(dst, (inst->reg == Z80_IX || inst->reg == Z80_IY) ? 9 : 5); |
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200 dst = sub_ir(dst, opts->regs[Z80_SP], SZ_W); |
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201 dst = translate_z80_reg(inst, &src_op, dst, opts); |
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202 dst = mov_rr(dst, src_op.base, SCRATCH1, SZ_W); |
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203 dst = call(dst, z80_write_word); |
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204 break; |
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205 case Z80_POP: |
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206 dst = zcycles(dst, (inst->reg == Z80_IX || inst->reg == Z80_IY) ? 8 : 4); |
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207 dst = sub_ir(dst, opts->regs[Z80_SP], SZ_W); |
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208 dst = translate_z80_reg(inst, &src_op, dst, opts); |
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209 dst = mov_rr(dst, src_op.base, SCRATCH1, SZ_W); |
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210 dst = call(dst, z80_write_word); |
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211 break; |
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212 /*case Z80_EX: |
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213 case Z80_EXX: |
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214 case Z80_LDI: |
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215 case Z80_LDIR: |
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216 case Z80_LDD: |
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217 case Z80_LDDR: |
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218 case Z80_CPI: |
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219 case Z80_CPIR: |
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220 case Z80_CPD: |
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221 case Z80_CPDR: |
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222 break;*/ |
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223 case Z80_ADD: |
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224 cycles = 4; |
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225 if (inst->addr_mode == Z80_IX_INDIRECT || inst->addr_mdoe == Z80_IY_INDIRECT) { |
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226 cycles += 12; |
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227 } else if(inst->addr_mode == Z80_IMMED) { |
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228 cycles += 3; |
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229 } else if(z80_size(inst) == SZ_W) { |
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230 cycles += 4; |
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231 } |
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232 dst = zcycles(dst, cycles); |
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233 dst = translate_z80_reg(inst, &dst_op, dst, opts); |
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234 dst = translate_z80_ea(inst, &src_op, dst, opts, READ, DONT_MODIFY); |
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235 if (src_op.mode == MODE_REG_DIRECT) { |
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236 dst = add_rr(dst, src_op.base, dst_op.base, z80_size(inst)); |
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237 } else { |
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238 dst = add_ir(dst, src_op.disp, dst_op.base, z80_size(inst)); |
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239 } |
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240 dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_C)); |
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241 dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_N)); |
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242 //TODO: Implement half-carry flag |
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243 if (z80_size(inst) == SZ_B) { |
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244 dst = setcc_rdisp8(dst, CC_O, zf_off(ZF_PV)); |
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245 dst = setcc_rdisp8(dst, CC_Z, zf_off(ZF_Z)); |
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246 dst = setcc_rdisp8(dst, CC_S, zf_off(ZF_S)); |
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247 } |
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248 dst = z80_save_reg(dst, inst, opts); |
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249 dst = z80_save_ea(dst, inst, opts); |
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250 break; |
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251 /*case Z80_ADC: |
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252 break;*/ |
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253 case Z80_SUB: |
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254 cycles = 4; |
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255 if (inst->addr_mode == Z80_IX_INDIRECT || inst->addr_mdoe == Z80_IY_INDIRECT) { |
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256 cycles += 12; |
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257 } else if(inst->addr_mode == Z80_IMMED) { |
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258 cycles += 3; |
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259 } |
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260 dst = zcycles(dst, cycles); |
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261 dst = translate_z80_reg(inst, &dst_op, dst, opts); |
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262 dst = translate_z80_ea(inst, &src_op, dst, opts, READ, DONT_MODIFY); |
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263 if (src_op.mode == MODE_REG_DIRECT) { |
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264 dst = sub_rr(dst, src_op.base, dst_op.base, z80_size(inst)); |
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265 } else { |
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266 dst = sub_ir(dst, src_op.disp, dst_op.base, z80_size(inst)); |
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267 } |
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268 dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_C)); |
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269 dst = mov_irdisp8(dst, 1, CONTEXT, zf_off(ZF_N)); |
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270 dst = setcc_rdisp8(dst, CC_O, zf_off(ZF_PV)); |
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271 //TODO: Implement half-carry flag |
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272 dst = setcc_rdisp8(dst, CC_Z, zf_off(ZF_Z)); |
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273 dst = setcc_rdisp8(dst, CC_S, zf_off(ZF_S) |
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274 dst = z80_save_reg(dst, inst, opts); |
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275 dst = z80_save_ea(dst, inst, opts); |
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276 break; |
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277 /*case Z80_SBC: |
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278 case Z80_AND: |
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279 case Z80_OR: |
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280 case Z80_XOR: |
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281 case Z80_CP:*/ |
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282 case Z80_INC: |
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283 cycles = 4; |
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284 if (inst->reg == Z80_IX || inst->reg == Z80_IY) { |
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285 cycles += 6; |
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286 } else if(z80_size(inst) == SZ_W) { |
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287 cycles += 2; |
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288 } else if(inst->reg == Z80_IXH || inst->reg == Z80_IXL || inst->reg == Z80_IYH || inst->reg == Z80_IYL || inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
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289 cycles += 4; |
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290 } |
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291 dst = translate_z80_reg(inst, &dst_op, dst, opts); |
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292 if (dst_op.mode == MODE_UNUSED) { |
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293 dst = translate_z80_ea(inst, &dst_op, dst, opts, READ, MODIFY); |
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294 } |
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295 dst = add_ir(dst, 1, dst_op.base, z80_size(inst)); |
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296 if (z80_size(inst) == SZ_B) { |
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297 dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_N)); |
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298 //TODO: Implement half-carry flag |
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299 dst = setcc_rdisp8(dst, CC_O, zf_off(ZF_PV)); |
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300 dst = setcc_rdisp8(dst, CC_Z, zf_off(ZF_Z)); |
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301 dst = setcc_rdisp8(dst, CC_S, zf_off(ZF_S)); |
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302 } |
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303 dst = z80_save_reg(dst, inst, opts); |
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304 dst = z80_save_ea(dst, inst, opts); |
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305 break; |
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306 /*case Z80_DEC: |
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307 break; |
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308 case Z80_DAA: |
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309 case Z80_CPL: |
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310 case Z80_NEG: |
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311 case Z80_CCF: |
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312 case Z80_SCF:*/ |
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313 case Z80_NOP: |
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314 if (inst->immed == 42) { |
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315 dst = call(dst, (uint8_t *)z80_save_context); |
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316 dst = mov_rr(dst, CONTEXT, RDI, SZ_Q); |
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317 dst = jmp(dst, (uint8_t *)z80_print_regs_exit); |
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318 } else { |
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319 dst = zcycles(dst, 4 * inst->immed); |
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320 } |
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321 break; |
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322 /*case Z80_HALT: |
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323 case Z80_DI: |
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324 case Z80_EI: |
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325 case Z80_IM: |
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326 case Z80_RLC: |
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327 case Z80_RL: |
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328 case Z80_RRC: |
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329 case Z80_RR: |
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330 case Z80_SLA: |
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331 case Z80_SRA: |
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332 case Z80_SLL: |
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333 case Z80_SRL: |
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334 case Z80_RLD: |
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335 case Z80_RRD: |
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336 case Z80_BIT: |
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337 case Z80_SET: |
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338 case Z80_RES: |
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339 case Z80_JP: |
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340 case Z80_JPCC: |
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341 case Z80_JR: |
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342 case Z80_JRCC: |
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343 case Z80_DJNZ: |
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344 case Z80_CALL: |
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345 case Z80_CALLCC: |
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346 case Z80_RET: |
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347 case Z80_RETCC: |
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348 case Z80_RETI: |
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349 case Z80_RETN: |
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350 case Z80_RST: |
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351 case Z80_IN: |
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352 case Z80_INI: |
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353 case Z80_INIR: |
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354 case Z80_IND: |
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355 case Z80_INDR: |
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356 case Z80_OUT: |
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357 case Z80_OUTI: |
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358 case Z80_OTIR: |
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359 case Z80_OUTD: |
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360 case Z80_OTDR:*/ |
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361 default: |
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362 fprintf(stderr, "unimplemented instruction: %d\n", inst->op); |
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363 exit(1); |
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364 } |
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365 } |
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366 |
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367 void translate_z80_stream(z80_context * context, uint16_t address) |
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368 { |
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369 } |