Mercurial > repos > blastem

annotate backend.c @ 2304:b3832f73444f

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Save audio to a wave file when saving video to APNG
author Michael Pavone <pavone@retrodev.com>
date Wed, 15 Mar 2023 18:50:24 -0700
parents 9caebcfeac72
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
467
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 282
diff changeset
1 /*
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 282
diff changeset
2 Copyright 2013 Michael Pavone
557
acec5464fa1e Rename x86_backend.h and x86_backend.c to backend.h and backend.c respectively
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
3 This file is part of BlastEm.
467
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 282
diff changeset
4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 282
diff changeset
5 */
557
acec5464fa1e Rename x86_backend.h and x86_backend.c to backend.h and backend.c respectively
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
6 #include "backend.h"
235
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
7 #include <stdlib.h>
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
8
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
9 deferred_addr * defer_address(deferred_addr * old_head, uint32_t address, uint8_t *dest)
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
10 {
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
11 deferred_addr * new_head = malloc(sizeof(deferred_addr));
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
12 new_head->next = old_head;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
13 new_head->address = address & 0xFFFFFF;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
14 new_head->dest = dest;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
15 return new_head;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
16 }
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
17
282
7b8a49220e3b Remove deferred address entries from abandoned translations inside z80_retrans_inst
Mike Pavone <pavone@retrodev.com>
parents: 235
diff changeset
18 void remove_deferred_until(deferred_addr **head_ptr, deferred_addr * remove_to)
7b8a49220e3b Remove deferred address entries from abandoned translations inside z80_retrans_inst
Mike Pavone <pavone@retrodev.com>
parents: 235
diff changeset
19 {
7b8a49220e3b Remove deferred address entries from abandoned translations inside z80_retrans_inst
Mike Pavone <pavone@retrodev.com>
parents: 235
diff changeset
20 for(deferred_addr *cur = *head_ptr; cur && cur != remove_to; cur = *head_ptr)
7b8a49220e3b Remove deferred address entries from abandoned translations inside z80_retrans_inst
Mike Pavone <pavone@retrodev.com>
parents: 235
diff changeset
21 {
7b8a49220e3b Remove deferred address entries from abandoned translations inside z80_retrans_inst
Mike Pavone <pavone@retrodev.com>
parents: 235
diff changeset
22 *head_ptr = cur->next;
7b8a49220e3b Remove deferred address entries from abandoned translations inside z80_retrans_inst
Mike Pavone <pavone@retrodev.com>
parents: 235
diff changeset
23 free(cur);
7b8a49220e3b Remove deferred address entries from abandoned translations inside z80_retrans_inst
Mike Pavone <pavone@retrodev.com>
parents: 235
diff changeset
24 }
7b8a49220e3b Remove deferred address entries from abandoned translations inside z80_retrans_inst
Mike Pavone <pavone@retrodev.com>
parents: 235
diff changeset
25 }
7b8a49220e3b Remove deferred address entries from abandoned translations inside z80_retrans_inst
Mike Pavone <pavone@retrodev.com>
parents: 235
diff changeset
26
235
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
27 void process_deferred(deferred_addr ** head_ptr, void * context, native_addr_func get_native)
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
28 {
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
29 deferred_addr * cur = *head_ptr;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
30 deferred_addr **last_next = head_ptr;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
31 while(cur)
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
32 {
558
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
33 code_ptr native = get_native(context, cur->address);//get_native_address(opts->native_code_map, cur->address);
235
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
34 if (native) {
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
35 int32_t disp = native - (cur->dest + 4);
558
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
36 code_ptr out = cur->dest;
235
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
37 *(out++) = disp;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
38 disp >>= 8;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
39 *(out++) = disp;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
40 disp >>= 8;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
41 *(out++) = disp;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
42 disp >>= 8;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
43 *out = disp;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
44 *last_next = cur->next;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
45 free(cur);
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
46 cur = *last_next;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
47 } else {
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
48 last_next = &(cur->next);
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
49 cur = cur->next;
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
50 }
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
51 }
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
52 }
d9bf8e61c33c Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
53
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
54 memmap_chunk const *find_map_chunk(uint32_t address, cpu_options *opts, uint16_t flags, uint32_t *size_sum)
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
55 {
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
56 if (size_sum) {
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
57 *size_sum = 0;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
58 }
2113
0013362c320c Fix handling of ram code flag offset calculation for ranges that are not an even multiple of the code flag page size
Michael Pavone <pavone@retrodev.com>
parents: 2036
diff changeset
59 uint32_t size_round_mask;
2036
45c4b74e7676 Fix bug in handling of MMAP_CODE regions smaller than 16KB
Michael Pavone <pavone@retrodev.com>
parents: 1964
diff changeset
60 if (flags == MMAP_CODE) {
2113
0013362c320c Fix handling of ram code flag offset calculation for ranges that are not an even multiple of the code flag page size
Michael Pavone <pavone@retrodev.com>
parents: 2036
diff changeset
61 size_round_mask = (1 << (opts->ram_flags_shift + 3)) - 1;
2036
45c4b74e7676 Fix bug in handling of MMAP_CODE regions smaller than 16KB
Michael Pavone <pavone@retrodev.com>
parents: 1964
diff changeset
62 } else {
2113
0013362c320c Fix handling of ram code flag offset calculation for ranges that are not an even multiple of the code flag page size
Michael Pavone <pavone@retrodev.com>
parents: 2036
diff changeset
63 size_round_mask = 0;
2036
45c4b74e7676 Fix bug in handling of MMAP_CODE regions smaller than 16KB
Michael Pavone <pavone@retrodev.com>
parents: 1964
diff changeset
64 }
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
65 address &= opts->address_mask;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
66 for (memmap_chunk const *cur = opts->memmap, *end = opts->memmap + opts->memmap_chunks; cur != end; cur++)
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
67 {
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
68 if (address >= cur->start && address < cur->end) {
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
69 return cur;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
70 } else if (size_sum && (cur->flags & flags) == flags) {
2036
45c4b74e7676 Fix bug in handling of MMAP_CODE regions smaller than 16KB
Michael Pavone <pavone@retrodev.com>
parents: 1964
diff changeset
71 uint32_t size = chunk_size(opts, cur);
2113
0013362c320c Fix handling of ram code flag offset calculation for ranges that are not an even multiple of the code flag page size
Michael Pavone <pavone@retrodev.com>
parents: 2036
diff changeset
72 if (size_round_mask) {
0013362c320c Fix handling of ram code flag offset calculation for ranges that are not an even multiple of the code flag page size
Michael Pavone <pavone@retrodev.com>
parents: 2036
diff changeset
73 if (size & size_round_mask) {
0013362c320c Fix handling of ram code flag offset calculation for ranges that are not an even multiple of the code flag page size
Michael Pavone <pavone@retrodev.com>
parents: 2036
diff changeset
74 size &= ~size_round_mask;
0013362c320c Fix handling of ram code flag offset calculation for ranges that are not an even multiple of the code flag page size
Michael Pavone <pavone@retrodev.com>
parents: 2036
diff changeset
75 size += size_round_mask + 1;
0013362c320c Fix handling of ram code flag offset calculation for ranges that are not an even multiple of the code flag page size
Michael Pavone <pavone@retrodev.com>
parents: 2036
diff changeset
76 }
2036
45c4b74e7676 Fix bug in handling of MMAP_CODE regions smaller than 16KB
Michael Pavone <pavone@retrodev.com>
parents: 1964
diff changeset
77 }
45c4b74e7676 Fix bug in handling of MMAP_CODE regions smaller than 16KB
Michael Pavone <pavone@retrodev.com>
parents: 1964
diff changeset
78 *size_sum += size;
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
79 }
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
80 }
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
81 return NULL;
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
82 }
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1079
diff changeset
83
653
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
84 void * get_native_pointer(uint32_t address, void ** mem_pointers, cpu_options * opts)
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
85 {
654
98927f1b005b Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents: 653
diff changeset
86 memmap_chunk const * memmap = opts->memmap;
653
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
87 address &= opts->address_mask;
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
88 for (uint32_t chunk = 0; chunk < opts->memmap_chunks; chunk++)
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
89 {
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
90 if (address >= memmap[chunk].start && address < memmap[chunk].end) {
1519
1f745318f10a Made the NOR flash emulation a bit more flexible, but not yet flexible enough to properly support the flash chip in the MegaWiFi cart
Michael Pavone <pavone@retrodev.com>
parents: 1419
diff changeset
91 if (!(memmap[chunk].flags & (MMAP_READ|MMAP_READ_CODE))) {
653
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
92 return NULL;
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
93 }
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
94 uint8_t * base = memmap[chunk].flags & MMAP_PTR_IDX
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
95 ? mem_pointers[memmap[chunk].ptr_index]
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
96 : memmap[chunk].buffer;
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
97 if (!base) {
1079
329ff62ea391 Add a new memory map flag to support an auxilliary buffer for translating code from MMAP_PTR_IDX chunks for which the pointer is null
Michael Pavone <pavone@retrodev.com>
parents: 690
diff changeset
98 if (memmap[chunk].flags & MMAP_AUX_BUFF) {
2134
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
99 address &= memmap[chunk].aux_mask;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
100 if (memmap[chunk].shift > 0) {
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
101 address <<= memmap[chunk].shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
102 } else if (memmap[chunk].shift < 0) {
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
103 address >>= -memmap[chunk].shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
104 }
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
105 return ((uint8_t *)memmap[chunk].buffer) + address;
1079
329ff62ea391 Add a new memory map flag to support an auxilliary buffer for translating code from MMAP_PTR_IDX chunks for which the pointer is null
Michael Pavone <pavone@retrodev.com>
parents: 690
diff changeset
106 }
653
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
107 return NULL;
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
108 }
2134
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
109 address &= memmap[chunk].mask;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
110 if (memmap[chunk].shift > 0) {
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
111 address <<= memmap[chunk].shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
112 } else if (memmap[chunk].shift < 0) {
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
113 address >>= -memmap[chunk].shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
114 }
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
115 return base + address;
653
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
116 }
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
117 }
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
118 return NULL;
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 558
diff changeset
119 }
690
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
120
1753
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
121 void * get_native_write_pointer(uint32_t address, void ** mem_pointers, cpu_options * opts)
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
122 {
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
123 memmap_chunk const * memmap = opts->memmap;
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
124 address &= opts->address_mask;
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
125 for (uint32_t chunk = 0; chunk < opts->memmap_chunks; chunk++)
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
126 {
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
127 if (address >= memmap[chunk].start && address < memmap[chunk].end) {
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
128 if (!(memmap[chunk].flags & (MMAP_WRITE))) {
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
129 return NULL;
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
130 }
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
131 uint8_t * base = memmap[chunk].flags & MMAP_PTR_IDX
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
132 ? mem_pointers[memmap[chunk].ptr_index]
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
133 : memmap[chunk].buffer;
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
134 if (!base) {
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
135 if (memmap[chunk].flags & MMAP_AUX_BUFF) {
2134
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
136 address &= memmap[chunk].aux_mask;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
137 if (memmap[chunk].shift > 0) {
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
138 address <<= memmap[chunk].shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
139 } else if (memmap[chunk].shift < 0) {
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
140 address >>= -memmap[chunk].shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
141 }
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
142 return ((uint8_t *)memmap[chunk].buffer) + address;
1753
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
143 }
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
144 return NULL;
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
145 }
2134
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
146 address &= memmap[chunk].mask;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
147 if (memmap[chunk].shift > 0) {
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
148 address <<= memmap[chunk].shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
149 } else if (memmap[chunk].shift < 0) {
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
150 address >>= -memmap[chunk].shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
151 }
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
152 return base + address;
1753
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
153 }
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
154 }
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
155 return NULL;
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
156 }
33ec5df77fac Integration of new Z80 core is sort of working now
Michael Pavone <pavone@retrodev.com>
parents: 1703
diff changeset
157
1313
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
158 uint16_t read_word(uint32_t address, void **mem_pointers, cpu_options *opts, void *context)
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
159 {
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
160 memmap_chunk const *chunk = find_map_chunk(address, opts, 0, NULL);
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
161 if (!chunk) {
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
162 return 0xFFFF;
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
163 }
1678
d377d6037dd9 Don't subtract chunk start from address in read_word as this is inconsistent with other consumers of memory map definitions. Fixes graphical corruption in NBA Jam TE and possibly other titles that use the Acclaim mapper with a 32Mbit ROM
Michael Pavone <pavone@retrodev.com>
parents: 1519
diff changeset
164 uint32_t offset = address & chunk->mask;
1313
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
165 if (chunk->flags & MMAP_READ) {
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
166 uint8_t *base;
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
167 if (chunk->flags & MMAP_PTR_IDX) {
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
168 base = mem_pointers[chunk->ptr_index];
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
169 } else {
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
170 base = chunk->buffer;
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
171 }
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
172 if (base) {
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
173 uint16_t val;
2134
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
174 if (chunk->shift > 0) {
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
175 offset <<= chunk->shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
176 } else if (chunk->shift < 0){
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
177 offset >>= chunk->shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
178 }
1313
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
179 if ((chunk->flags & MMAP_ONLY_ODD) || (chunk->flags & MMAP_ONLY_EVEN)) {
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
180 offset /= 2;
1419
92e7dafcc0dc Fix a silly variable shadowing bug in read_word
Michael Pavone <pavone@retrodev.com>
parents: 1313
diff changeset
181 val = base[offset];
1313
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
182 if (chunk->flags & MMAP_ONLY_ODD) {
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
183 val |= 0xFF00;
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
184 } else {
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
185 val = val << 8 | 0xFF;
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
186 }
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
187 } else {
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
188 val = *(uint16_t *)(base + offset);
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
189 }
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
190 return val;
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
191 }
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
192 }
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
193 if ((!(chunk->flags & MMAP_READ) || (chunk->flags & MMAP_FUNC_NULL)) && chunk->read_16) {
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
194 return chunk->read_16(offset, context);
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
195 }
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
196 return 0xFFFF;
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
197 }
b27d7bf1107e Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
Michael Pavone <pavone@retrodev.com>
parents: 1142
diff changeset
198
1838
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
199 void write_word(uint32_t address, uint16_t value, void **mem_pointers, cpu_options *opts, void *context)
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
200 {
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
201 memmap_chunk const *chunk = find_map_chunk(address, opts, 0, NULL);
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
202 if (!chunk) {
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
203 return;
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
204 }
1964
9d35ce5012a6 Apply fixes to helper functions in backend.c from interp branch
Michael Pavone <pavone@retrodev.com>
parents: 1952
diff changeset
205 uint32_t offset = address & chunk->mask;
1838
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
206 if (chunk->flags & MMAP_WRITE) {
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
207 uint8_t *base;
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
208 if (chunk->flags & MMAP_PTR_IDX) {
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
209 base = mem_pointers[chunk->ptr_index];
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
210 } else {
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
211 base = chunk->buffer;
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
212 }
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
213 if (base) {
2134
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
214 if (chunk->shift > 0) {
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
215 offset <<= chunk->shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
216 } else if (chunk->shift < 0){
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
217 offset >>= chunk->shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
218 }
1838
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
219 if ((chunk->flags & MMAP_ONLY_ODD) || (chunk->flags & MMAP_ONLY_EVEN)) {
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
220 offset /= 2;
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
221 if (chunk->flags & MMAP_ONLY_EVEN) {
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
222 value >>= 16;
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
223 }
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
224 base[offset] = value;
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
225 } else {
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
226 *(uint16_t *)(base + offset) = value;
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
227 }
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
228 return;
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
229 }
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
230 }
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
231 if ((!(chunk->flags & MMAP_WRITE) || (chunk->flags & MMAP_FUNC_NULL)) && chunk->write_16) {
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
232 chunk->write_16(offset, context, value);
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
233 }
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
234 }
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1753
diff changeset
235
1703
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
236 uint8_t read_byte(uint32_t address, void **mem_pointers, cpu_options *opts, void *context)
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
237 {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
238 memmap_chunk const *chunk = find_map_chunk(address, opts, 0, NULL);
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
239 if (!chunk) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
240 return 0xFF;
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
241 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
242 uint32_t offset = address & chunk->mask;
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
243 if (chunk->flags & MMAP_READ) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
244 uint8_t *base;
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
245 if (chunk->flags & MMAP_PTR_IDX) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
246 base = mem_pointers[chunk->ptr_index];
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
247 } else {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
248 base = chunk->buffer;
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
249 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
250 if (base) {
2134
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
251 if (chunk->shift > 0) {
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
252 offset <<= chunk->shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
253 } else if (chunk->shift < 0){
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
254 offset >>= chunk->shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
255 }
1703
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
256 if ((chunk->flags & MMAP_ONLY_ODD) || (chunk->flags & MMAP_ONLY_EVEN)) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
257 if (address & 1) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
258 if (chunk->flags & MMAP_ONLY_EVEN) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
259 return 0xFF;
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
260 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
261 } else if (chunk->flags & MMAP_ONLY_ODD) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
262 return 0xFF;
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
263 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
264 offset /= 2;
1964
9d35ce5012a6 Apply fixes to helper functions in backend.c from interp branch
Michael Pavone <pavone@retrodev.com>
parents: 1952
diff changeset
265 } else if(opts->byte_swap) {
9d35ce5012a6 Apply fixes to helper functions in backend.c from interp branch
Michael Pavone <pavone@retrodev.com>
parents: 1952
diff changeset
266 offset ^= 1;
1703
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
267 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
268 return base[offset];
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
269 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
270 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
271 if ((!(chunk->flags & MMAP_READ) || (chunk->flags & MMAP_FUNC_NULL)) && chunk->read_8) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
272 return chunk->read_8(offset, context);
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
273 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
274 return 0xFF;
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
275 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
276
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
277 void write_byte(uint32_t address, uint8_t value, void **mem_pointers, cpu_options *opts, void *context)
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
278 {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
279 memmap_chunk const *chunk = find_map_chunk(address, opts, 0, NULL);
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
280 if (!chunk) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
281 return;
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
282 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
283 uint32_t offset = address & chunk->mask;
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
284 if (chunk->flags & MMAP_WRITE) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
285 uint8_t *base;
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
286 if (chunk->flags & MMAP_PTR_IDX) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
287 base = mem_pointers[chunk->ptr_index];
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
288 } else {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
289 base = chunk->buffer;
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
290 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
291 if (base) {
2134
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
292 if (chunk->shift > 0) {
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
293 offset <<= chunk->shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
294 } else if (chunk->shift < 0){
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
295 offset >>= chunk->shift;
9caebcfeac72 Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Michael Pavone <pavone@retrodev.com>
parents: 2113
diff changeset
296 }
1703
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
297 if ((chunk->flags & MMAP_ONLY_ODD) || (chunk->flags & MMAP_ONLY_EVEN)) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
298 if (address & 1) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
299 if (chunk->flags & MMAP_ONLY_EVEN) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
300 return;
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
301 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
302 } else if (chunk->flags & MMAP_ONLY_ODD) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
303 return;
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
304 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
305 offset /= 2;
1964
9d35ce5012a6 Apply fixes to helper functions in backend.c from interp branch
Michael Pavone <pavone@retrodev.com>
parents: 1952
diff changeset
306 } else if(opts->byte_swap) {
9d35ce5012a6 Apply fixes to helper functions in backend.c from interp branch
Michael Pavone <pavone@retrodev.com>
parents: 1952
diff changeset
307 offset ^= 1;
1703
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
308 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
309 base[offset] = value;
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
310 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
311 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
312 if ((!(chunk->flags & MMAP_WRITE) || (chunk->flags & MMAP_FUNC_NULL)) && chunk->write_8) {
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
313 chunk->write_8(offset, context, value);
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
314 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
315 }
49a52c737bf0 Fix zero flag calculation in CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1678
diff changeset
316
690
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
317 uint32_t chunk_size(cpu_options *opts, memmap_chunk const *chunk)
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
318 {
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
319 if (chunk->mask == opts->address_mask) {
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
320 return chunk->end - chunk->start;
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
321 } else {
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
322 return chunk->mask + 1;
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
323 }
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
324 }
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
325
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
326 uint32_t ram_size(cpu_options *opts)
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
327 {
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
328 uint32_t size = 0;
2036
45c4b74e7676 Fix bug in handling of MMAP_CODE regions smaller than 16KB
Michael Pavone <pavone@retrodev.com>
parents: 1964
diff changeset
329 uint32_t minsize = 1 << (opts->ram_flags_shift + 3);
690
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
330 for (int i = 0; i < opts->memmap_chunks; i++)
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
331 {
1142
5c8b1c33ca10 Invalidate translated code on a cartridge bank change in SMS mode. Fix handling of bank 0
Michael Pavone <pavone@retrodev.com>
parents: 1130
diff changeset
332 if (opts->memmap[i].flags & MMAP_CODE) {
2036
45c4b74e7676 Fix bug in handling of MMAP_CODE regions smaller than 16KB
Michael Pavone <pavone@retrodev.com>
parents: 1964
diff changeset
333 uint32_t cursize = chunk_size(opts, opts->memmap + i);
45c4b74e7676 Fix bug in handling of MMAP_CODE regions smaller than 16KB
Michael Pavone <pavone@retrodev.com>
parents: 1964
diff changeset
334 if (cursize < minsize) {
45c4b74e7676 Fix bug in handling of MMAP_CODE regions smaller than 16KB
Michael Pavone <pavone@retrodev.com>
parents: 1964
diff changeset
335 size += minsize;
690
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
336 } else {
2036
45c4b74e7676 Fix bug in handling of MMAP_CODE regions smaller than 16KB
Michael Pavone <pavone@retrodev.com>
parents: 1964
diff changeset
337 size += cursize;
690
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
338 }
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
339 }
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
340 }
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
341 return size;
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 654
diff changeset
342 }