Mercurial > repos > blastem
annotate dis.c @ 622:b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
author | Michael Pavone <pavone@retrodev.com> |
---|---|
date | Tue, 17 Jun 2014 19:01:01 -0700 |
parents | 140af5509ce7 |
children | 316facea756d de6f00204fa2 |
rev | line source |
---|---|
467
140af5509ce7
Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents:
197
diff
changeset
|
1 /* |
140af5509ce7
Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents:
197
diff
changeset
|
2 Copyright 2013 Michael Pavone |
140af5509ce7
Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents:
197
diff
changeset
|
3 This file is part of BlastEm. |
140af5509ce7
Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents:
197
diff
changeset
|
4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
140af5509ce7
Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents:
197
diff
changeset
|
5 */ |
2
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
6 #include "68kinst.h" |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
7 #include <stdio.h> |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
8 #include <stdlib.h> |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
9 |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
10 uint8_t visited[(16*1024*1024)/16]; |
139
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
11 uint8_t label[(16*1024*1024)/8]; |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
12 |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
13 void visit(uint32_t address) |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
14 { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
15 address &= 0xFFFFFF; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
16 visited[address/16] |= 1 << ((address / 2) % 8); |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
17 } |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
18 |
134 | 19 void reference(uint32_t address) |
20 { | |
21 address &= 0xFFFFFF; | |
22 //printf("referenced: %X\n", address); | |
139
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
23 label[address/16] |= 1 << (address % 8); |
134 | 24 } |
25 | |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
26 uint8_t is_visited(uint32_t address) |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
27 { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
28 address &= 0xFFFFFF; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
29 return visited[address/16] & (1 << ((address / 2) % 8)); |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
30 } |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
31 |
134 | 32 uint8_t is_label(uint32_t address) |
33 { | |
34 address &= 0xFFFFFF; | |
139
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
35 return label[address/16] & (1 << (address % 8)); |
134 | 36 } |
37 | |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
38 typedef struct deferred { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
39 uint32_t address; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
40 struct deferred *next; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
41 } deferred; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
42 |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
43 deferred * defer(uint32_t address, deferred * next) |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
44 { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
45 if (is_visited(address)) { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
46 return next; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
47 } |
111 | 48 //printf("deferring %X\n", address); |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
49 deferred * d = malloc(sizeof(deferred)); |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
50 d->address = address; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
51 d->next = next; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
52 return d; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
53 } |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
54 |
134 | 55 void check_reference(m68kinst * inst, m68k_op_info * op) |
56 { | |
57 switch(op->addr_mode) | |
58 { | |
59 case MODE_PC_DISPLACE: | |
60 reference(inst->address + 2 + op->params.regs.displacement); | |
61 break; | |
62 case MODE_ABSOLUTE: | |
63 case MODE_ABSOLUTE_SHORT: | |
64 reference(op->params.immed); | |
65 break; | |
66 } | |
67 } | |
68 | |
69 uint8_t labels = 0; | |
70 uint8_t addr = 0; | |
151
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
71 uint8_t only = 0; |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
72 |
2
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
73 int main(int argc, char ** argv) |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
74 { |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
75 long filesize; |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
76 unsigned short *filebuf; |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
77 char disbuf[1024]; |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
78 m68kinst instbuf; |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
79 unsigned short * cur; |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
80 FILE * f = fopen(argv[1], "rb"); |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
81 fseek(f, 0, SEEK_END); |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
82 filesize = ftell(f); |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
83 fseek(f, 0, SEEK_SET); |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
84 filebuf = malloc(filesize); |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
85 fread(filebuf, 2, filesize/2, f); |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
86 fclose(f); |
151
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
87 deferred *def = NULL, *tmpd; |
134 | 88 for(uint8_t opt = 2; opt < argc; ++opt) { |
89 if (argv[opt][0] == '-') { | |
197
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
90 FILE * address_log; |
134 | 91 switch (argv[opt][1]) |
92 { | |
93 case 'l': | |
94 labels = 1; | |
95 break; | |
96 case 'a': | |
97 addr = 1; | |
98 break; | |
151
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
99 case 'o': |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
100 only = 1; |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
101 break; |
197
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
102 case 'f': |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
103 opt++; |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
104 if (opt >= argc) { |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
105 fputs("-f must be followed by a filename\n", stderr); |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
106 exit(1); |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
107 } |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
108 address_log = fopen(argv[opt], "r"); |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
109 if (!address_log) { |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
110 fprintf(stderr, "Failed to open %s for reading\n", argv[opt]); |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
111 exit(1); |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
112 } |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
113 while (fgets(disbuf, sizeof(disbuf), address_log)) { |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
114 if (disbuf[0]) { |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
115 uint32_t address = strtol(disbuf, NULL, 16); |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
116 if (address) { |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
117 def = defer(address, def); |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
118 reference(address); |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
119 } |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
120 } |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
164
diff
changeset
|
121 } |
134 | 122 } |
151
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
123 } else { |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
124 uint32_t address = strtol(argv[opt], NULL, 16); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
125 def = defer(address, def); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
126 reference(address); |
134 | 127 } |
128 } | |
2
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
129 for(cur = filebuf; cur - filebuf < (filesize/2); ++cur) |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
130 { |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
131 *cur = (*cur >> 8) | (*cur << 8); |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
132 } |
139
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
133 uint32_t start = filebuf[2] << 16 | filebuf[3], tmp_addr; |
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
134 uint32_t int_2 = filebuf[0x68/2] << 16 | filebuf[0x6A/2]; |
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
135 uint32_t int_4 = filebuf[0x70/2] << 16 | filebuf[0x72/2]; |
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
136 uint32_t int_6 = filebuf[0x78/2] << 16 | filebuf[0x7A/2]; |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
137 uint16_t *encoded, *next; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
138 uint32_t size; |
151
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
139 if (!def || !only) { |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
140 def = defer(start, def); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
141 def = defer(int_2, def); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
142 def = defer(int_4, def); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
143 def = defer(int_6, def); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
148
diff
changeset
|
144 } |
139
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
145 uint32_t address; |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
146 while(def) { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
147 do { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
148 encoded = NULL; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
149 address = def->address; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
150 if (!is_visited(address)) { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
151 encoded = filebuf + address/2; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
152 } |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
153 tmpd = def; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
154 def = def->next; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
155 free(tmpd); |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
156 } while(def && encoded == NULL); |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
157 if (!encoded) { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
158 break; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
159 } |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
160 for(;;) { |
48
0bdda50c7364
Don't try to disassemble addresses beyond the end of the cartridge
Mike Pavone <pavone@retrodev.com>
parents:
47
diff
changeset
|
161 if (address > filesize) { |
0bdda50c7364
Don't try to disassemble addresses beyond the end of the cartridge
Mike Pavone <pavone@retrodev.com>
parents:
47
diff
changeset
|
162 break; |
0bdda50c7364
Don't try to disassemble addresses beyond the end of the cartridge
Mike Pavone <pavone@retrodev.com>
parents:
47
diff
changeset
|
163 } |
47
4b6c667326a1
Fix bug in address visitation in disassembler
Mike Pavone <pavone@retrodev.com>
parents:
44
diff
changeset
|
164 visit(address); |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
165 next = m68k_decode(encoded, &instbuf, address); |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
166 address += (next-encoded)*2; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
167 encoded = next; |
111 | 168 //m68k_disasm(&instbuf, disbuf); |
169 //printf("%X: %s\n", instbuf.address, disbuf); | |
134 | 170 check_reference(&instbuf, &(instbuf.src)); |
171 check_reference(&instbuf, &(instbuf.dst)); | |
148
4a400aec81bb
Bail out of disassembly of a particular stream when we hit an invalid instruction
Mike Pavone <pavone@retrodev.com>
parents:
139
diff
changeset
|
172 if (instbuf.op == M68K_ILLEGAL || instbuf.op == M68K_RTS || instbuf.op == M68K_RTE || instbuf.op == M68K_INVALID) { |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
173 break; |
164
afbfb0ac0256
Small fix to disassembler
Mike Pavone <pavone@retrodev.com>
parents:
151
diff
changeset
|
174 } |
afbfb0ac0256
Small fix to disassembler
Mike Pavone <pavone@retrodev.com>
parents:
151
diff
changeset
|
175 if (instbuf.op == M68K_BCC || instbuf.op == M68K_DBCC || instbuf.op == M68K_BSR) { |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
176 if (instbuf.op == M68K_BCC && instbuf.extra.cond == COND_TRUE) { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
177 address = instbuf.address + 2 + instbuf.src.params.immed; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
178 encoded = filebuf + address/2; |
134 | 179 reference(address); |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
180 if (is_visited(address)) { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
181 break; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
182 } |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
183 } else { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
184 tmp_addr = instbuf.address + 2 + instbuf.src.params.immed; |
134 | 185 reference(tmp_addr); |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
186 def = defer(tmp_addr, def); |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
187 } |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
188 } else if(instbuf.op == M68K_JMP) { |
80
7b1e16e981ef
Fix bug in disassembler that caused it to disassemble addresses it shouldn't
Mike Pavone <pavone@retrodev.com>
parents:
48
diff
changeset
|
189 if (instbuf.src.addr_mode == MODE_ABSOLUTE || instbuf.src.addr_mode == MODE_ABSOLUTE_SHORT) { |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
190 address = instbuf.src.params.immed; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
191 encoded = filebuf + address/2; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
192 if (is_visited(address)) { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
193 break; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
194 } |
114
e821b6fde0e4
Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents:
111
diff
changeset
|
195 } else if (instbuf.src.addr_mode = MODE_PC_DISPLACE) { |
e821b6fde0e4
Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents:
111
diff
changeset
|
196 address = instbuf.src.params.regs.displacement + instbuf.address + 2; |
e821b6fde0e4
Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents:
111
diff
changeset
|
197 encoded = filebuf + address/2; |
e821b6fde0e4
Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents:
111
diff
changeset
|
198 if (is_visited(address)) { |
e821b6fde0e4
Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents:
111
diff
changeset
|
199 break; |
e821b6fde0e4
Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents:
111
diff
changeset
|
200 } |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
201 } else { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
202 break; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
203 } |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
204 } else if(instbuf.op == M68K_JSR) { |
80
7b1e16e981ef
Fix bug in disassembler that caused it to disassemble addresses it shouldn't
Mike Pavone <pavone@retrodev.com>
parents:
48
diff
changeset
|
205 if (instbuf.src.addr_mode == MODE_ABSOLUTE || instbuf.src.addr_mode == MODE_ABSOLUTE_SHORT) { |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
206 def = defer(instbuf.src.params.immed, def); |
164
afbfb0ac0256
Small fix to disassembler
Mike Pavone <pavone@retrodev.com>
parents:
151
diff
changeset
|
207 } else if (instbuf.src.addr_mode == MODE_PC_DISPLACE) { |
114
e821b6fde0e4
Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents:
111
diff
changeset
|
208 def = defer(instbuf.src.params.regs.displacement + instbuf.address + 2, def); |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
209 } |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
210 } |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
211 } |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
212 } |
134 | 213 if (labels) { |
214 for (address = filesize; address < (16*1024*1024); address++) { | |
215 if (is_label(address)) { | |
216 printf("ADR_%X equ $%X\n", address, address); | |
217 } | |
218 } | |
219 puts(""); | |
220 } | |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
221 for (address = 0; address < filesize; address+=2) { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
222 if (is_visited(address)) { |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
223 encoded = filebuf + address/2; |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
224 m68k_decode(encoded, &instbuf, address); |
134 | 225 if (labels) { |
226 m68k_disasm_labels(&instbuf, disbuf); | |
139
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
227 if (address == start) { |
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
228 puts("start:"); |
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
229 } |
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
230 if(address == int_2) { |
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
231 puts("int_2:"); |
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
232 } |
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
233 if(address == int_4) { |
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
234 puts("int_4:"); |
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
235 } |
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
236 if(address == int_6) { |
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
237 puts("int_6:"); |
cce22fb4c450
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents:
134
diff
changeset
|
238 } |
134 | 239 if (is_label(instbuf.address)) { |
240 printf("ADR_%X:\n", instbuf.address); | |
241 } | |
242 if (addr) { | |
243 printf("\t%s\t;%X\n", disbuf, instbuf.address); | |
244 } else { | |
245 printf("\t%s\n", disbuf); | |
246 } | |
247 } else { | |
248 m68k_disasm(&instbuf, disbuf); | |
249 printf("%X: %s\n", instbuf.address, disbuf); | |
250 } | |
44
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
251 } |
ec71370820f2
Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
252 } |
2
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
253 return 0; |
5df303bf72e6
Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
254 } |