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annotate z80inst.h @ 622:b76d2a628ab9

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Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
author Michael Pavone <pavone@retrodev.com>
date Tue, 17 Jun 2014 19:01:01 -0700
parents 140af5509ce7
children 1625555e346e
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
467
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1 /*
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2 Copyright 2013 Michael Pavone
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3 This file is part of BlastEm.
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
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5 */
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6 #ifndef Z80INST_H_
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7 #define Z80INST_H_
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8
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9 #include <stdint.h>
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10
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11 enum {
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12 Z80_LD,
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13 Z80_PUSH,
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14 Z80_POP,
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15 Z80_EX,
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16 Z80_EXX,
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17 Z80_LDI,
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18 Z80_LDIR,
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19 Z80_LDD,
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20 Z80_LDDR,
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21 Z80_CPI,
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22 Z80_CPIR,
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23 Z80_CPD,
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24 Z80_CPDR,
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25 Z80_ADD,
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26 Z80_ADC,
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27 Z80_SUB,
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28 Z80_SBC,
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29 Z80_AND,
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30 Z80_OR,
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31 Z80_XOR,
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32 Z80_CP,
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33 Z80_INC,
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34 Z80_DEC,
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35 Z80_DAA,
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36 Z80_CPL,
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37 Z80_NEG,
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38 Z80_CCF,
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39 Z80_SCF,
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40 Z80_NOP,
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41 Z80_HALT,
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42 Z80_DI,
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43 Z80_EI,
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44 Z80_IM,
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45 Z80_RLC,
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46 Z80_RL,
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47 Z80_RRC,
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48 Z80_RR,
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49 Z80_SLA,
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50 Z80_SRA,
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51 Z80_SLL,
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52 Z80_SRL,
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53 Z80_RLD,
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54 Z80_RRD,
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55 Z80_BIT,
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56 Z80_SET,
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57 Z80_RES,
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58 Z80_JP,
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59 Z80_JPCC,
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60 Z80_JR,
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61 Z80_JRCC,
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62 Z80_DJNZ,
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63 Z80_CALL,
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64 Z80_CALLCC,
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65 Z80_RET,
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66 Z80_RETCC,
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67 Z80_RETI,
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68 Z80_RETN,
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69 Z80_RST,
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70 Z80_IN,
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71 Z80_INI,
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72 Z80_INIR,
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73 Z80_IND,
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74 Z80_INDR,
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75 Z80_OUT,
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76 Z80_OUTI,
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77 Z80_OTIR,
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78 Z80_OUTD,
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79 Z80_OTDR
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80 };
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81
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82 enum {
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83 Z80_C=0,
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84 Z80_B,
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85 Z80_E,
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86 Z80_D,
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87 Z80_L,
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88 Z80_H,
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89 Z80_IXL,
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90 Z80_IXH,
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91 Z80_IYL,
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92 Z80_IYH,
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93 Z80_I,
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94 Z80_R,
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95 Z80_A,
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96 Z80_BC,
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97 Z80_DE,
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98 Z80_HL,
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99 Z80_SP,
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100 Z80_AF,
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101 Z80_IX,
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102 Z80_IY,
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103 Z80_UNUSED
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104 };
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105
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106 #define Z80_IMMED_FLAG 0x80
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107 #define Z80_USE_IMMED (Z80_IMMED_FLAG|Z80_UNUSED)
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108
199
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109 enum {
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110 Z80_CC_NZ,
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111 Z80_CC_Z,
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112 Z80_CC_NC,
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113 Z80_CC_C,
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114 Z80_CC_PO,
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115 Z80_CC_PE,
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116 Z80_CC_P,
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117 Z80_CC_M
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118 };
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119
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120 enum {
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121 Z80_REG,
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122 Z80_REG_INDIRECT,
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123 Z80_IMMED,
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124 Z80_IMMED_INDIRECT,
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125 Z80_IX_DISPLACE,
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126 Z80_IY_DISPLACE
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127 };
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128 #define Z80_DIR 0x80
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129
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130 typedef struct {
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131 uint8_t op;
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132 uint8_t reg;
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133 uint8_t addr_mode;
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134 uint8_t ea_reg;
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135 uint16_t immed;
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136 } z80inst;
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137
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138 uint8_t * z80_decode(uint8_t * istream, z80inst * decoded);
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139 int z80_disasm(z80inst * decoded, char * dst, uint16_t address);
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140 uint8_t z80_high_reg(uint8_t reg);
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141 uint8_t z80_low_reg(uint8_t reg);
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142 uint8_t z80_word_reg(uint8_t reg);
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143 uint8_t z80_is_terminal(z80inst * inst);
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145 #endif //Z80INST_H_
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