Mercurial > repos > blastem
annotate fib.s68 @ 15:c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
author | Mike Pavone <pavone@retrodev.com> |
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date | Tue, 27 Nov 2012 22:43:32 -0800 |
parents | 5a2c1da6dd0f |
children | 4717146a7606 |
rev | line source |
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0
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
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1 lea 0, a7 |
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
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2 moveq #10, d0 |
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3 bsr fib |
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
4 illegal |
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
5 fib: |
1
5a2c1da6dd0f
Make sure all operations are long-word length on fib example.
Mike Pavone <pavone@retrodev.com>
parents:
0
diff
changeset
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6 cmp.l #2, d0 |
0
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
7 blt base |
1
5a2c1da6dd0f
Make sure all operations are long-word length on fib example.
Mike Pavone <pavone@retrodev.com>
parents:
0
diff
changeset
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8 subq.l #1, d0 |
0
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
9 move.l d0, -(a7) |
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
10 bsr fib |
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
11 move.l (a7), d1 |
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
12 exg d0, d1 |
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
13 move.l d1, (a7) |
1
5a2c1da6dd0f
Make sure all operations are long-word length on fib example.
Mike Pavone <pavone@retrodev.com>
parents:
0
diff
changeset
|
14 subq.l #1, d0 |
0
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
15 bsr fib |
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
16 move.l (a7)+, d1 |
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
17 add.l d1, d0 |
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
18 rts |
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
19 base: |
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
20 moveq #1, d0 |
2432d177e1ac
Initial work on M68K instruction decoding
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
21 rts |