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annotate m68k_to_x86.c @ 15:c0f339564819

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Make x86 generator generic with respect to operand size for immediate parameters.
author Mike Pavone <pavone@retrodev.com>
date Tue, 27 Nov 2012 22:43:32 -0800
parents 2bdad0f52f42
children 3e7bfde7606e
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14
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1 #include "gen_x86.h"
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2 #include "m68k_to_x86.h"
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3
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4
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5 #define BUS 4
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6 #define CYCLES RAX
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7 #define LIMIT RBP
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8 #define SCRATCH RCX
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9 #define CONTEXT RSI
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10
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11 #define FLAG_N RBX
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12 #define FLAG_V BH
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13 #define FLAG_Z RDX
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14 #define FLAG_C DH
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15
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16 typedef struct {
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17 int32_t disp;
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18 uint8_t mode;
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19 uint8_t base;
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20 uint8_t index;
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21 uint8_t cycles;
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22 } x86_ea;
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23
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24 void handle_cycle_limit();
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25
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26 uint8_t * cycles(uint8_t * dst, uint32_t num)
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27 {
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28 dst = add_i32r(dst, num, CYCLES);
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29 }
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30
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31 uint8_t * check_cycles(uint8_t * dst) Ivds
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32 {
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33 dst = cmp_rr(dst, CYCLES, LIMIT, SZ_D);
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34 dst = jcc(dst, CC_G, 5);
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35 dst = call(dst, (char *)handle_cycle_limit);
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36 }
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37
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38 int8_t native_reg(m68k_op_info * op, x86_68k_options * opts)
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39 {
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40 if (op->addr_mode == MODE_REG) {
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41 return opts->dregs[op->params.regs.pri];
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42 }
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43 if (op->addr_mode == MODE_AREG) {
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44 return opts->aregs[op->params.regs.pri];
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45 }
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46 return -1;
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47 }
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48
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49 uint8_t * translate_m68k_ea(m68k_op_info * op, x86_ea * dst, uint8_t * out, x86_68k_options * opts)
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50 {
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51 int8_t reg = native_reg(op, opts);
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52 if (reg >= 0) {
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53 dst->mode = MODE_REG_DIRECT;
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54 dst->base = reg;
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55 return;
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56 }
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57 switch (op->addr_mode)
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58 {
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59 case MODE_REG:
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60 case MODE_AREG:
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61 dst->mode = MODE_DISPLACE8;
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62 dst->base = CONTEXT;
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63 dst->disp = (op->addr_mode = MODE_REG ? offsetof(m68k_context, dregs) : offsetof(m68k_context, aregs)) + 4 * op->params.regs.pri;
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64 break;
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65 case MODE_AREG_INDIRECT:
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66
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67 break;
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68 }
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69 }
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70
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71 uint8_t * translate_m68k(uint8_t * dst, m68kinst * inst, x86_68k_options * opts)
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72 {
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73 int8_t reg_a, reg_b, flags_reg;
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74 uint8_t dir = 0;
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75 int32_t offset;
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76 switch(inst->op)
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77 {
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78 case M68K_ABCD:
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79 case M68K_ADD:
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80 case M68K_ADDX:
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81 case M68K_AND:
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82 case M68K_ANDI_CCR:
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83 case M68K_ANDI_SR:
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84 case M68K_ASL:
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85 case M68K_ASR:
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86 case M68K_BCC:
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87 case M68K_BCHG:
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88 case M68K_BCLR:
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89 case M68K_BSET:
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90 case M68K_BSR:
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91 case M68K_BTST:
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92 case M68K_CHK:
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93 case M68K_CLR:
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94 case M68K_CMP:
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95 case M68K_DBCC:
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96 case M68K_DIVS:
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97 case M68K_DIVU:
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98 case M68K_EOR:
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99 case M68K_EORI_CCR:
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100 case M68K_EORI_SR:
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101 case M68K_EXG:
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102 case M68K_EXT:
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103 case M68K_ILLEGAL:
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104 case M68K_JMP:
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105 case M68K_JSR:
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106 case M68K_LEA:
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107 case M68K_LINK:
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108 case M68K_LSL:
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109 case M68K_LSR:
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110 case M68K_MOVE:
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111
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112 if ((inst->src.addr_mode == MODE_REG || inst->src.addr_mode == MODE_AREG || (inst->src.addr_mode == MODE_IMMEDIATE && inst->src.variant == VAR_QUICK)) && (inst->dst.addr_mode == MODE_REG || inst->dst.addr_mode == MODE_AREG)) {
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113 dst = cycles(dst, BUS);
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114 reg_a = native_reg(&(inst->src), opts);
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115 reg_b = native_reg(&(inst->dst), opts);
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116 dst = cycles(dst, BUS);
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117 if (reg_a >= 0 && reg_b >= 0) {
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118 dst = mov_rr(dst, reg_a, reg_b, inst->extra.size);
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119 flags_reg = reg_b;
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120 } else if(reg_a >= 0) {
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121 offset = inst->dst.addr_mode == MODE_REG ? offsetof(m68k_context, dregs) : offsetof(m68k_context, aregs);
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122 dst = mov_rrdisp8(dst, reg_a, CONTEXT, offset + 4 * inst->dst.params.regs.pri, inst->extra.size);
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123 flags_reg = reg_a;
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124 } else if(reg_b >= 0) {
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125 if (inst->src.addr_mode == MODE_REG) {
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126 dst = mov_rdisp8r(dst, CONTEXT, offsetof(m68k_context, dregs) + 4 * inst->src.params.regs.pri, reg_b, inst->extra.size);
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127 } else if(inst->src.addr_mode == MODE_AREG) {
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128 dst = mov_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->src.params.regs.pri, reg_b, inst->extra.size);
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129 } else {
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130 dst = mov_i32r(dst, inst->src.params.u32, reg_b);
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131 }
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132 flags_reg = reg_b;
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133 } else {
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134
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135 }
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136 dst = mov_i8r(dst, 0, FLAG_V);
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137 dst = mov_i8r(dst, 0, FLAG_C);
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138 switch (inst->extra.size)
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139 {
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140 case OPSIZE_BYTE:
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diff changeset
141 dst = cmp_i8r(dst, 0, reg_b, SZ_B);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
142 break;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
143 case OPSIZE_WORD:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
144 dst = cmp_i8r(dst, 0, reg_b, SZ_W);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
145 break;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
146 case OPSIZE_LONG:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
147 dst = cmp_i8r(dst, 0, reg_b, SZ_D);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
148 break;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
149 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
150 dst = setcc_r(dst, CC_Z, FLAG_Z);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
151 dst = setcc_r(dst, CC_S, FLAG_N);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
152 dst = check_cycles(dst);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
153 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
154
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
155 if (reg_a >= 0 && reg_b >= 0) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
156 dst = cycles(dst, BUS);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
157 dst = mov_rr(dst, reg_a, reg_b, inst->extra.size);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
158 dst = mov_i8r(dst, 0, FLAG_V);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
159 dst = mov_i8r(dst, 0, FLAG_C);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
160 switch (inst->extra.size)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
161 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
162 case OPSIZE_BYTE:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
163 dst = cmp_i8r(dst, 0, reg_b, SZ_B);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
164 break;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
165 case OPSIZE_WORD:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
166 dst = cmp_i8r(dst, 0, reg_b, SZ_W);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
167 break;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
168 case OPSIZE_LONG:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
169 dst = cmp_i8r(dst, 0, reg_b, SZ_D);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
170 break;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
171 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
172 dst = setcc_r(dst, CC_Z, FLAG_Z);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
173 dst = setcc_r(dst, CC_S, FLAG_N);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
174 dst = check_cycles(dst);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
175 } else if(reg_a >= 0 || reg_b >= 0) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
176 if (reg_a >= 0) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
177 switch (inst->dst.addr_mode)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
178 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
179 case MODE_REG:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
180 dst = cycles(dst, BUS);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
181 dst = mov_rr(dst, reg_a, reg_b, inst->extra.size);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
182 dst = check_cycles(dst);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
183 break;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
184 case MODE_AREG:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
185 break;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
186 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
187 } else {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
188 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
189 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
190 break;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
191 case M68K_MOVE_CCR:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
192 case M68K_MOVE_FROM_SR:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
193 case M68K_MOVE_SR:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
194 case M68K_MOVE_USP:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
195 case M68K_MOVEM:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
196 case M68K_MOVEP:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
197 case M68K_MULS:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
198 case M68K_MULU:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
199 case M68K_NBCD:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
200 case M68K_NEG:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
201 case M68K_NEGX:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
202 case M68K_NOP:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
203 case M68K_NOT:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
204 case M68K_OR:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
205 case M68K_ORI_CCR:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
206 case M68K_ORI_SR:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
207 case M68K_PEA:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
208 case M68K_RESET:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
209 case M68K_ROL:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
210 case M68K_ROR:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
211 case M68K_ROXL:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
212 case M68K_ROXR:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
213 case M68K_RTE:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
214 case M68K_RTR:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
215 case M68K_RTS:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
216 case M68K_SBCD:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
217 case M68K_SCC:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
218 case M68K_STOP:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
219 case M68K_SUB:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
220 case M68K_SUBX:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
221 case M68K_SWAP:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
222 case M68K_TAS:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
223 case M68K_TRAP:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
224 case M68K_TRAPV:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
225 case M68K_TST:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
226 case M68K_UNLK:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
227 case M68K_INVALID:
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
228 break;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
229 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
230 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
231