Mercurial > repos > blastem

annotate analyze.py @ 1298:d5a47597b61f

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
author Michael Pavone <pavone@retrodev.com>
date Sat, 25 Mar 2017 00:21:32 -0700
parents 006008a3f370
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
6
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1 #!/usr/bin/env python
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2
428
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
3 #OLD
6
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4 #0 - !SE
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
5 #1 - !CAS
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
6 #2 - A0
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
7 #3 - A1
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
8 #------
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
9 #4 - A2
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
10 #5 - A3
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
11 #6 - A7
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
12 #7 - EDCLK
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
13 #------
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
14 #8 - !HSYNC
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
15 #9 - A4
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
16 #A - A5
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
17 #B - A6
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
18 #------
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
19 #C - !RAS
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
20 #D - !WB/!WE
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
21 #E - !DT/!OE
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
22 #F - SC
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
23
428
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
24 #NEW
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
25 #0 - !IPL2
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
26 #1 - !CAS
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
27 #2 - A0
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
28 #3 - A1
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
29 #------
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
30 #4 - A2
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
31 #5 - A3
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
32 #6 - A7
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
33 #7 - !HSYNC
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
34 #------
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
35 #8 - !VSYNC
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
36 #9 - A4
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
37 #A - A5
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
38 #B - A6
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
39 #------
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
40 #C - !RAS
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
41 #D - !WB/!WE
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
42 #E - !DT/!OE
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
43 #F - SC
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
44
6
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
45
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
46 #VRAM swizzling
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
47 #A0 = V0
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
48 #A1 = V1
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
49 #A8 = V2
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
50 #A9 = V3
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
51 #A10 = V4
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
52 #A11 = V5
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
53 #A12 = V6
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
54 #A13 = V7
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
55 #A14 = V8
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
56 #A15 = V9
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
57 #--guesses follow--
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
58 #A2 = V10
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
59 #A3 = V11
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
60 #A4 = V12
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
61 #A5 = V13
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
62 #A6 = V14
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
63 #A7 = V15
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
64
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
65
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
66 def get_addr(sample):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
67 return ((sample >> 2) & 0xF) | ((sample >> 5) & 0x70) | ((sample << 1) & 0x80)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
68
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
69 def swizzle_addr(addr):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
70 return (addr & 0x0003) | ((addr >> 6) & 0x03FC) | ((addr << 8) & 0xFC00)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
71
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
72 def print_addr_op(addr, addr_format, mode, samplenum, triggerpos, rate):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
73 print '{0:{1}} ({2:{1}}) {3}@{4} ns'.format(swizzle_addr(addr), addr_format, addr, mode, (samplenum - triggerpos)*rate)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
74
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
75 def detect_rise(last, sample, bit):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
76 mask = 1 << bit
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
77 return (not last & mask) and (sample & mask)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
78
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
79 def detect_fall(last, sample, bit):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
80 mask = 1 << bit
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
81 return (last & mask) and (not sample & mask)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
82
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
83 def detect_high(sample, bit):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
84 mask = 1 << bit
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
85 return sample & mask
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
86
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
87
428
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
88 ipl2 = 0x0
6
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
89 cas = 0x1
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
90 ras = 0xC
428
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
91 vsync = 0x8
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
92 hsync = 0x7
6
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
93 wewb = 0xD
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
94 oedt = 0xE
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
95 sc = 0xF
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
96
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
97 last = False
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
98 state = 'begin'
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
99 triggerpos = 0
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
100 readcounter = 0
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
101 sillyread = 0
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
102 lastaddr = -1
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
103 edclk_ticks = 0
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
104 sc_ticks = 0
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
105 tick_start = False
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
106 #f = open('street_fighter_vram_100mhz_hsync_trig_2.ols')
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
107 #f = open('street_fighter_vram_50mhz_hsync_trig.ols')
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
108 from sys import argv,exit
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
109 if len(argv) < 2:
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
110 print 'usage: analyze.py filename'
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
111 exit(1)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
112 if '-b' in argv:
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
113 addr_format = '016b'
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
114 else:
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
115 addr_format = '04X'
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
116 f = open(argv[1])
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
117 for line in f:
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
118 if line.startswith(';TriggerPosition'):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
119 _,_,triggerpos = line.partition(':')
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
120 triggerpos = int(triggerpos.strip())
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
121 elif line.startswith(';Rate'):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
122 _,_,rate = line.partition(':')
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
123 #convert to nanoseconds between samples
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
124 rate = (1.0/float(rate.strip())) * 1000000000.0
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
125 elif not line.startswith(';'):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
126 sample,_,samplenum = line.partition('@')
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
127 samplenum = int(samplenum.strip())
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
128 sample = int(sample, 16)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
129 if detect_rise(last, sample, sc):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
130 sc_ticks += 1
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
131 if not (last is False):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
132 #detect falling edge of !HSYNC
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
133 if detect_fall(last, sample, hsync):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
134 if readcounter:
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
135 print readcounter, 'reads,', sillyread, 'redundant reads'
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
136 readcounter = sillyread = 0
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
137 if not tick_start is False:
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
138 print 'SC:', sc_ticks, ' ticks, {0}MHz'.format(float(sc_ticks)/((rate * (samplenum-tick_start)) / 1000.0))
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
139 tick_start = samplenum
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
140 edclk_ticks = sc_ticks = 0
428
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
141 print 'HSYNC Start @ {0} ns'.format((samplenum - triggerpos)*rate)
6
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
142 #detect rising edge of !HSYNC
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
143 elif detect_rise(last, sample, hsync):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
144 if not tick_start is False:
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
145 float(edclk_ticks)/((rate * (samplenum-tick_start)) / 1000.0)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
146 print 'EDCLK:', edclk_ticks, ' ticks, {0}MHz'.format(float(edclk_ticks)/((rate * (samplenum-tick_start)) / 1000.0))
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
147 print 'SC:', sc_ticks, ' ticks, {0}MHz'.format(float(sc_ticks)/((rate * (samplenum-tick_start)) / 1000.0))
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
148 tick_start = samplenum
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
149 edclk_ticks = sc_ticks = 0
428
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
150 print 'HSYNC End @ {0} ns'.format((samplenum - triggerpos)*rate)
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
151 if detect_fall(last, sample, vsync):
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
152 print 'VSYNC Start @ {0} ns'.format((samplenum - triggerpos)*rate)
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
153 elif detect_rise(last, sample, vsync):
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
154 print 'VSYNC End @ {0} ns'.format((samplenum - triggerpos)*rate)
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
155 if detect_fall(last, sample, ipl2):
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
156 print 'IPL2 Low @ {0} ns'.format((samplenum - triggerpos)*rate)
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
157 elif detect_rise(last, sample, ipl2):
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
158 print 'IPL2 High @ {0} ns'.format((samplenum - triggerpos)*rate)
6
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
159 if state == 'begin':
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
160 #detect falling edge of !RAS
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
161 if detect_fall(last, sample, ras):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
162 state = 'ras'
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
163 row = get_addr(sample)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
164 mode = 'ram' if detect_high(sample, oedt) else 'read transfer'
428
006008a3f370 Last set of changes to analyze.py from when I was last working on reversing the VDP
Mike Pavone <pavone@retrodev.com>
parents: 6
diff changeset
165 elif detect_fall(last, sample, cas) and detect_high(sample, oedt):
6
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
166 state = 'cas'
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
167 elif state == 'ras':
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
168 if detect_fall(last, sample, cas):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
169 state = 'begin'
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
170 col = get_addr(sample)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
171 addr = (row << 8) | col
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
172 if mode == 'ram':
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
173 state = 'ras_cas'
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
174 else:
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
175 print_addr_op(addr, addr_format, mode, samplenum, triggerpos, rate)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
176 lastaddr = addr
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
177 #print '{0:04X} {1} - {2:02X}:{3:02X} - {0:016b}'.format(addr, mode, row, col)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
178 elif state == 'cas':
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
179 if detect_fall(last, sample, ras):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
180 state = 'begin'
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
181 print 'refresh@{0} ns'.format((samplenum - triggerpos)*rate)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
182 elif state == 'ras_cas':
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
183 if detect_fall(last, sample, oedt):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
184 readcounter += 1
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
185 if addr == lastaddr:
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
186 sillyread += 1
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
187 print_addr_op(addr, addr_format, 'read', samplenum, triggerpos, rate)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
188 state = 'begin'
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
189 elif detect_fall(last, sample, wewb):
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
190 print_addr_op(addr, addr_format, 'write', samplenum, triggerpos, rate)
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
191 state = 'begin'
b231162c8fdd Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
192 last = sample