annotate trans.c @ 2048:ed9a6de28158 mame_interp

Always use "call" style interp generation from CPU DSL and default to NEW_CORE in mame_interp branch
author Michael Pavone <pavone@retrodev.com>
date Tue, 21 Sep 2021 23:28:54 -0700
parents 638eb2d25696
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
467
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 440
diff changeset
1 /*
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 440
diff changeset
2 Copyright 2013 Michael Pavone
567
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents: 467
diff changeset
3 This file is part of BlastEm.
467
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 440
diff changeset
4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 440
diff changeset
5 */
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
6 #include "68kinst.h"
1838
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1304
diff changeset
7 #ifdef NEW_CORE
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1304
diff changeset
8 #include "m68k.h"
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1304
diff changeset
9 #else
569
9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents: 567
diff changeset
10 #include "m68k_core.h"
1838
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1304
diff changeset
11 #endif
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
12 #include "mem.h"
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
13 #include <stdio.h>
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
14 #include <stdlib.h>
440
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
15 #include <string.h>
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
16
836
124a58fdcf3a Get trans program compiling again
Michael Pavone <pavone@retrodev.com>
parents: 709
diff changeset
17 int headless = 1;
124a58fdcf3a Get trans program compiling again
Michael Pavone <pavone@retrodev.com>
parents: 709
diff changeset
18 void render_errorbox(char * title, char * buf)
124a58fdcf3a Get trans program compiling again
Michael Pavone <pavone@retrodev.com>
parents: 709
diff changeset
19 {
124a58fdcf3a Get trans program compiling again
Michael Pavone <pavone@retrodev.com>
parents: 709
diff changeset
20 }
124a58fdcf3a Get trans program compiling again
Michael Pavone <pavone@retrodev.com>
parents: 709
diff changeset
21
124a58fdcf3a Get trans program compiling again
Michael Pavone <pavone@retrodev.com>
parents: 709
diff changeset
22 void render_infobox(char * title, char * buf)
124a58fdcf3a Get trans program compiling again
Michael Pavone <pavone@retrodev.com>
parents: 709
diff changeset
23 {
124a58fdcf3a Get trans program compiling again
Michael Pavone <pavone@retrodev.com>
parents: 709
diff changeset
24 }
124a58fdcf3a Get trans program compiling again
Michael Pavone <pavone@retrodev.com>
parents: 709
diff changeset
25
1838
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1304
diff changeset
26 #ifndef NEW_CORE
1507
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents: 1304
diff changeset
27 uint64_t total_cycles;
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents: 1304
diff changeset
28
440
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
29 m68k_context * sync_components(m68k_context * context, uint32_t address)
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
30 {
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
31 if (context->current_cycle > 0x80000000) {
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
32 context->current_cycle -= 0x80000000;
1507
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents: 1304
diff changeset
33 total_cycles += 0x80000000;
440
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
34 }
1304
5b90d7669eee Fix exit trace mode edge case. Call do_sync if trace mode bit is changed in eori sr
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
35 if (context->status & M68K_STATUS_TRACE || context->trace_pending) {
1303
208803173ebc Implemented M68K trace mode. Some edge cases/SR update paths still need work
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
36 context->target_cycle = context->current_cycle;
208803173ebc Implemented M68K trace mode. Some edge cases/SR update paths still need work
Michael Pavone <pavone@retrodev.com>
parents: 1082
diff changeset
37 }
440
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
38 return context;
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
39 }
1838
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1304
diff changeset
40 #endif
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
41
1082
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 836
diff changeset
42 m68k_context *reset_handler(m68k_context *context)
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 836
diff changeset
43 {
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 836
diff changeset
44 m68k_print_regs(context);
1991
7d4df6b74263 Somewhat buggy implementations of shift instructions in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 1990
diff changeset
45 #ifdef NEW_CORE
7d4df6b74263 Somewhat buggy implementations of shift instructions in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 1990
diff changeset
46 printf("cycles: %d\n", context->cycles);
7d4df6b74263 Somewhat buggy implementations of shift instructions in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 1990
diff changeset
47 #else
1507
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents: 1304
diff changeset
48 total_cycles += context->current_cycle;
2455662378ed Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
Michael Pavone <pavone@retrodev.com>
parents: 1304
diff changeset
49 printf("%ld cycles\n", total_cycles);
1991
7d4df6b74263 Somewhat buggy implementations of shift instructions in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 1990
diff changeset
50 #endif
1082
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 836
diff changeset
51 exit(0);
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 836
diff changeset
52 //unreachable
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 836
diff changeset
53 return context;
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 836
diff changeset
54 }
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 836
diff changeset
55
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
56 int main(int argc, char ** argv)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
57 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
58 long filesize;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
59 unsigned short *filebuf;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
60 char disbuf[1024];
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
61 unsigned short * cur;
569
9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents: 567
diff changeset
62 m68k_options opts;
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
63 FILE * f = fopen(argv[1], "rb");
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
64 fseek(f, 0, SEEK_END);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
65 filesize = ftell(f);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
66 fseek(f, 0, SEEK_SET);
572
0f32f52fc98e Make some small changes in trans so that it is more likely to produce the same output as mustrans when given misbehaving programs. Add lea to testcases.txt. Improve the output of comparetest.py so that known issues can easily be separated from new ones.
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
67 filebuf = malloc(0x400000);
0f32f52fc98e Make some small changes in trans so that it is more likely to produce the same output as mustrans when given misbehaving programs. Add lea to testcases.txt. Improve the output of comparetest.py so that known issues can easily be separated from new ones.
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
68 memset(filebuf, 0, 0x400000);
0f32f52fc98e Make some small changes in trans so that it is more likely to produce the same output as mustrans when given misbehaving programs. Add lea to testcases.txt. Improve the output of comparetest.py so that known issues can easily be separated from new ones.
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
69 fread(filebuf, 2, filesize/2 > 0x200000 ? 0x200000 : filesize/2, f);
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
70 fclose(f);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
71 for(cur = filebuf; cur - filebuf < (filesize/2); ++cur)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
72 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
73 *cur = (*cur >> 8) | (*cur << 8);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
74 }
440
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
75 memmap_chunk memmap[2];
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
76 memset(memmap, 0, sizeof(memmap_chunk)*2);
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
77 memmap[0].end = 0x400000;
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
78 memmap[0].mask = 0xFFFFFF;
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
79 memmap[0].flags = MMAP_READ;
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
80 memmap[0].buffer = filebuf;
567
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents: 467
diff changeset
81
440
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
82 memmap[1].start = 0xE00000;
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
83 memmap[1].end = 0x1000000;
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
84 memmap[1].mask = 0xFFFF;
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
85 memmap[1].flags = MMAP_READ | MMAP_WRITE | MMAP_CODE;
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
86 memmap[1].buffer = malloc(64 * 1024);
572
0f32f52fc98e Make some small changes in trans so that it is more likely to produce the same output as mustrans when given misbehaving programs. Add lea to testcases.txt. Improve the output of comparetest.py so that known issues can easily be separated from new ones.
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
87 memset(memmap[1].buffer, 0, 64 * 1024);
709
3f065c20423c Fix trans so it compiles again
Michael Pavone <pavone@retrodev.com>
parents: 572
diff changeset
88 init_m68k_opts(&opts, memmap, 2, 1);
1082
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 836
diff changeset
89 m68k_context * context = init_68k_context(&opts, reset_handler);
709
3f065c20423c Fix trans so it compiles again
Michael Pavone <pavone@retrodev.com>
parents: 572
diff changeset
90 context->mem_pointers[0] = memmap[0].buffer;
3f065c20423c Fix trans so it compiles again
Michael Pavone <pavone@retrodev.com>
parents: 572
diff changeset
91 context->mem_pointers[1] = memmap[1].buffer;
1991
7d4df6b74263 Somewhat buggy implementations of shift instructions in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 1990
diff changeset
92 #ifdef NEW_CORE
7d4df6b74263 Somewhat buggy implementations of shift instructions in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 1990
diff changeset
93 context->cycles = 40;
7d4df6b74263 Somewhat buggy implementations of shift instructions in new 68K core
Michael Pavone <pavone@retrodev.com>
parents: 1990
diff changeset
94 #else
1990
57ae42c3ab45 Fix 68k test harness target, add cycle count to output and add a cycle limit
Michael Pavone <pavone@retrodev.com>
parents: 1838
diff changeset
95 context->current_cycle = 40;
57ae42c3ab45 Fix 68k test harness target, add cycle count to output and add a cycle limit
Michael Pavone <pavone@retrodev.com>
parents: 1838
diff changeset
96 context->target_cycle = context->sync_cycle = 8000;
1838
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1304
diff changeset
97 #endif
709
3f065c20423c Fix trans so it compiles again
Michael Pavone <pavone@retrodev.com>
parents: 572
diff changeset
98 m68k_reset(context);
1838
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1304
diff changeset
99 #ifdef NEW_CORE
1990
57ae42c3ab45 Fix 68k test harness target, add cycle count to output and add a cycle limit
Michael Pavone <pavone@retrodev.com>
parents: 1838
diff changeset
100 m68k_execute(context, 8000);
57ae42c3ab45 Fix 68k test harness target, add cycle count to output and add a cycle limit
Michael Pavone <pavone@retrodev.com>
parents: 1838
diff changeset
101 puts("hit cycle limit");
1838
0c1491818f4b WIP new 68K core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents: 1304
diff changeset
102 #endif
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
103 return 0;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
104 }
440
306986209cba Fix 68K test harness
Mike Pavone <pavone@retrodev.com>
parents: 212
diff changeset
105