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comparison z80_to_x86.c @ 899:07bfbbbb4b2e

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Fix for Z80 retranslation post alignment rework
author Michael Pavone <pavone@retrodev.com>
date Thu, 26 Nov 2015 22:30:41 -0800
parents 2f1157f00dc6
children 30efd12b1be1
comparison
equal deleted inserted replaced
898:2f1157f00dc6 899:07bfbbbb4b2e
2093 z80_context * z80_handle_code_write(uint32_t address, z80_context * context) 2093 z80_context * z80_handle_code_write(uint32_t address, z80_context * context)
2094 { 2094 {
2095 uint32_t inst_start = z80_get_instruction_start(context->static_code_map, address); 2095 uint32_t inst_start = z80_get_instruction_start(context->static_code_map, address);
2096 if (inst_start != INVALID_INSTRUCTION_START) { 2096 if (inst_start != INVALID_INSTRUCTION_START) {
2097 code_ptr dst = z80_get_native_address(context, inst_start); 2097 code_ptr dst = z80_get_native_address(context, inst_start);
2098 code_info code = {dst, dst+16}; 2098 code_info code = {dst, dst+32, 0};
2099 z80_options * opts = context->options; 2099 z80_options * opts = context->options;
2100 dprintf("patching code at %p for Z80 instruction at %X due to write to %X\n", code.cur, inst_start, address); 2100 dprintf("patching code at %p for Z80 instruction at %X due to write to %X\n", code.cur, inst_start, address);
2101 mov_ir(&code, inst_start, opts->gen.scratch1, SZ_D); 2101 mov_ir(&code, inst_start, opts->gen.scratch1, SZ_D);
2102 call(&code, opts->retrans_stub); 2102 call(&code, opts->retrans_stub);
2103 } 2103 }
2534 call(code, options->write_8_noinc); 2534 call(code, options->write_8_noinc);
2535 retn(code); 2535 retn(code);
2536 2536
2537 options->retrans_stub = code->cur; 2537 options->retrans_stub = code->cur;
2538 tmp_stack_off = code->stack_off; 2538 tmp_stack_off = code->stack_off;
2539 //calculate size of patch
2540 mov_ir(code, 0x7FFF, options->gen.scratch1, SZ_D);
2541 code->stack_off += sizeof(void *);
2542 if (code->stack_off & 0xF) {
2543 sub_ir(code, 16 - (code->stack_off & 0xF), RSP, SZ_PTR);
2544 }
2545 call_noalign(code, options->retrans_stub);
2546 uint32_t patch_size = code->cur - options->retrans_stub;
2547 code->cur = options->retrans_stub;
2548 code->stack_off = tmp_stack_off;
2549
2539 //pop return address 2550 //pop return address
2540 pop_r(code, options->gen.scratch2); 2551 pop_r(code, options->gen.scratch2);
2541 add_ir(code, 16-sizeof(void*), RSP, SZ_PTR); 2552 add_ir(code, 16-sizeof(void*), RSP, SZ_PTR);
2542 code->stack_off = tmp_stack_off; 2553 code->stack_off = tmp_stack_off;
2543 call(code, options->gen.save_context); 2554 call(code, options->gen.save_context);
2544 //adjust pointer before move and call instructions that got us here 2555 //adjust pointer before move and call instructions that got us here
2545 sub_ir(code, options->gen.scratch1 >= R8 ? 11 : 10, options->gen.scratch2, SZ_PTR); 2556 sub_ir(code, patch_size, options->gen.scratch2, SZ_PTR);
2546 push_r(code, options->gen.context_reg); 2557 push_r(code, options->gen.context_reg);
2547 call_args(code, (code_ptr)z80_retranslate_inst, 3, options->gen.scratch1, options->gen.context_reg, options->gen.scratch2); 2558 call_args(code, (code_ptr)z80_retranslate_inst, 3, options->gen.scratch1, options->gen.context_reg, options->gen.scratch2);
2548 pop_r(code, options->gen.context_reg); 2559 pop_r(code, options->gen.context_reg);
2549 mov_rr(code, RAX, options->gen.scratch1, SZ_PTR); 2560 mov_rr(code, RAX, options->gen.scratch1, SZ_PTR);
2550 call(code, options->gen.load_context); 2561 call(code, options->gen.load_context);