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comparison genesis.c @ 1773:0a26f3657295 mame_interp

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Remove MAME Z80 core in favor of my new Z80 core
author Michael Pavone <pavone@retrodev.com>
date Tue, 12 Mar 2019 21:59:52 -0700
parents 8fe162bdb038
children a9fc826c6a9d
comparison
equal deleted inserted replaced
1772:75172d440900 1773:0a26f3657295
37 #define MAX_SOUND_CYCLES 1000 37 #define MAX_SOUND_CYCLES 1000
38 #else 38 #else
39 #define MAX_SOUND_CYCLES 100000 39 #define MAX_SOUND_CYCLES 100000
40 #endif 40 #endif
41 41
42 #ifdef NEW_CORE 42 #ifndef USE_NATIVE
43 #define Z80_CYCLE cycles 43 #define Z80_CYCLE cycles
44 #define Z80_OPTS opts 44 #define Z80_OPTS opts
45 #define z80_handle_code_write(...) 45 #define z80_handle_code_write(...)
46 #else 46 #else
47 #define Z80_CYCLE current_cycle 47 #define Z80_CYCLE current_cycle
297 #endif 297 #endif
298 298
299 static void z80_next_int_pulse(z80_context * z_context) 299 static void z80_next_int_pulse(z80_context * z_context)
300 { 300 {
301 genesis_context * gen = z_context->system; 301 genesis_context * gen = z_context->system;
302 #ifdef NEW_CORE 302 #ifndef USE_NATIVE
303 z_context->int_cycle = vdp_next_vint_z80(gen->vdp); 303 z_context->int_cycle = vdp_next_vint_z80(gen->vdp);
304 z_context->int_end_cycle = z_context->int_cycle + Z80_INT_PULSE_MCLKS; 304 z_context->int_end_cycle = z_context->int_cycle + Z80_INT_PULSE_MCLKS;
305 z_context->int_value = 0xFF; 305 z_context->int_value = 0xFF;
306 z80_sync_cycle(z_context, z_context->sync_cycle); 306 z80_sync_cycle(z_context, z_context->sync_cycle);
307 #else 307 #else
313 313
314 static void sync_z80(z80_context * z_context, uint32_t mclks) 314 static void sync_z80(z80_context * z_context, uint32_t mclks)
315 { 315 {
316 #ifndef NO_Z80 316 #ifndef NO_Z80
317 if (z80_enabled) { 317 if (z80_enabled) {
318 #ifdef NEW_CORE 318 #ifndef USE_NATIVE
319 if (z_context->int_cycle == 0xFFFFFFFFU) { 319 if (z_context->int_cycle == 0xFFFFFFFFU) {
320 z80_next_int_pulse(z_context); 320 z80_next_int_pulse(z_context);
321 } 321 }
322 #endif 322 #endif
323 z80_run(z_context, mclks); 323 z80_run(z_context, mclks);
427 } 427 }
428 adjust_int_cycle(context, v_context); 428 adjust_int_cycle(context, v_context);
429 if (gen->reset_cycle < context->target_cycle) { 429 if (gen->reset_cycle < context->target_cycle) {
430 context->target_cycle = gen->reset_cycle; 430 context->target_cycle = gen->reset_cycle;
431 } 431 }
432 if (address) {
432 #ifdef USE_NATIVE 433 #ifdef USE_NATIVE
433 if (address) {
434 if (gen->header.enter_debugger) { 434 if (gen->header.enter_debugger) {
435 gen->header.enter_debugger = 0; 435 gen->header.enter_debugger = 0;
436 debugger(context, address); 436 debugger(context, address);
437 } 437 }
438 #ifdef NEW_CORE 438 if (gen->header.save_state && (z_context->pc || !z_context->native_pc || z_context->reset || !z_context->busreq)) {
439 #else
439 if (gen->header.save_state) { 440 if (gen->header.save_state) {
440 #else
441 if (gen->header.save_state && (z_context->pc || !z_context->native_pc || z_context->reset || !z_context->busreq)) {
442 #endif 441 #endif
443 uint8_t slot = gen->header.save_state - 1; 442 uint8_t slot = gen->header.save_state - 1;
444 gen->header.save_state = 0; 443 gen->header.save_state = 0;
445 #ifndef NEW_CORE 444 #ifdef USE_NATIVE
446 if (z_context->native_pc && !z_context->reset) { 445 if (z_context->native_pc && !z_context->reset) {
447 //advance Z80 core to the start of an instruction 446 //advance Z80 core to the start of an instruction
448 while (!z_context->pc) 447 while (!z_context->pc)
449 { 448 {
450 sync_z80(z_context, z_context->current_cycle + MCLKS_PER_Z80); 449 sync_z80(z_context, z_context->current_cycle + MCLKS_PER_Z80);
451 } 450 }
452 } 451 }
453 #endif 452 #endif
454 char *save_path = slot == SERIALIZE_SLOT ? NULL : get_slot_name(&gen->header, slot, use_native_states ? "state" : "gst"); 453 char *save_path = slot == SERIALIZE_SLOT ? NULL : get_slot_name(&gen->header, slot, use_native_states ? "state" : "gst");
454 #ifdef USE_NATIVE
455 if (use_native_states || slot == SERIALIZE_SLOT) { 455 if (use_native_states || slot == SERIALIZE_SLOT) {
456 #endif
456 serialize_buffer state; 457 serialize_buffer state;
457 init_serialize(&state); 458 init_serialize(&state);
458 genesis_serialize(gen, &state, address); 459 genesis_serialize(gen, &state, address);
459 if (slot == SERIALIZE_SLOT) { 460 if (slot == SERIALIZE_SLOT) {
460 gen->serialize_tmp = state.data; 461 gen->serialize_tmp = state.data;
463 context->should_return = 1; 464 context->should_return = 1;
464 } else { 465 } else {
465 save_to_file(&state, save_path); 466 save_to_file(&state, save_path);
466 free(state.data); 467 free(state.data);
467 } 468 }
469 #ifdef USE_NATIVE
468 } else { 470 } else {
469 save_gst(gen, save_path, address); 471 save_gst(gen, save_path, address);
470 } 472 }
473 #endif
471 printf("Saved state to %s\n", save_path); 474 printf("Saved state to %s\n", save_path);
472 free(save_path); 475 free(save_path);
473 } else if(gen->header.save_state) { 476 } else if(gen->header.save_state) {
474 context->sync_cycle = context->current_cycle + 1; 477 context->sync_cycle = context->current_cycle + 1;
475 } 478 }
476 } 479 }
477 #endif
478 #ifdef REFRESH_EMULATION 480 #ifdef REFRESH_EMULATION
479 last_sync_cycle = context->current_cycle; 481 last_sync_cycle = context->current_cycle;
480 #endif 482 #endif
481 return context; 483 return context;
482 } 484 }
997 { 999 {
998 z80_context * context = vcontext; 1000 z80_context * context = vcontext;
999 genesis_context *gen = context->system; 1001 genesis_context *gen = context->system;
1000 1002
1001 if (gen->bus_busy) { 1003 if (gen->bus_busy) {
1002 #if defined(USE_NATIVE) || defined(NEW_CORE)
1003 context->Z80_CYCLE = gen->m68k->current_cycle; 1004 context->Z80_CYCLE = gen->m68k->current_cycle;
1004 #else
1005 context->m_icount = 0;
1006 #endif
1007 } 1005 }
1008 1006
1009 //typical delay from bus arbitration 1007 //typical delay from bus arbitration
1010 #if defined(USE_NATIVE) || defined(NEW_CORE)
1011 context->Z80_CYCLE += 3 * MCLKS_PER_Z80; 1008 context->Z80_CYCLE += 3 * MCLKS_PER_Z80;
1012 #else
1013 context->m_icount -= 3;
1014 #endif
1015 //TODO: add cycle for an access right after a previous one 1009 //TODO: add cycle for an access right after a previous one
1016 //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high 1010 //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high
1017 // Needs a new logic analyzer capture to get the actual delay on the 68K side 1011 // Needs a new logic analyzer capture to get the actual delay on the 68K side
1018 gen->m68k->current_cycle += 8 * MCLKS_PER_68K; 1012 gen->m68k->current_cycle += 8 * MCLKS_PER_68K;
1019 1013
1033 static void *z80_write_bank(uint32_t location, void * vcontext, uint8_t value) 1027 static void *z80_write_bank(uint32_t location, void * vcontext, uint8_t value)
1034 { 1028 {
1035 z80_context * context = vcontext; 1029 z80_context * context = vcontext;
1036 genesis_context *gen = context->system; 1030 genesis_context *gen = context->system;
1037 if (gen->bus_busy) { 1031 if (gen->bus_busy) {
1038 #if defined(USE_NATIVE) || defined(NEW_CORE)
1039 context->Z80_CYCLE = gen->m68k->current_cycle; 1032 context->Z80_CYCLE = gen->m68k->current_cycle;
1040 #else
1041 context->m_icount = 0;
1042 #endif
1043 } 1033 }
1044 //typical delay from bus arbitration 1034 //typical delay from bus arbitration
1045 #if defined(USE_NATIVE) || defined(NEW_CORE)
1046 context->Z80_CYCLE += 3 * MCLKS_PER_Z80; 1035 context->Z80_CYCLE += 3 * MCLKS_PER_Z80;
1047 #else
1048 context->m_icount -= 3;
1049 #endif
1050 //TODO: add cycle for an access right after a previous one 1036 //TODO: add cycle for an access right after a previous one
1051 //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high 1037 //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high
1052 // Needs a new logic analyzer capture to get the actual delay on the 68K side 1038 // Needs a new logic analyzer capture to get the actual delay on the 68K side
1053 gen->m68k->current_cycle += 8 * MCLKS_PER_68K; 1039 gen->m68k->current_cycle += 8 * MCLKS_PER_68K;
1054 1040
1427 z80_map[0].buffer = gen->zram = calloc(1, Z80_RAM_BYTES); 1413 z80_map[0].buffer = gen->zram = calloc(1, Z80_RAM_BYTES);
1428 #ifndef NO_Z80 1414 #ifndef NO_Z80
1429 z80_options *z_opts = malloc(sizeof(z80_options)); 1415 z80_options *z_opts = malloc(sizeof(z80_options));
1430 init_z80_opts(z_opts, z80_map, 5, NULL, 0, MCLKS_PER_Z80, 0xFFFF); 1416 init_z80_opts(z_opts, z80_map, 5, NULL, 0, MCLKS_PER_Z80, 0xFFFF);
1431 gen->z80 = init_z80_context(z_opts); 1417 gen->z80 = init_z80_context(z_opts);
1432 #ifndef NEW_CORE 1418 #ifdef USE_NATIVE
1433 gen->z80->next_int_pulse = z80_next_int_pulse; 1419 gen->z80->next_int_pulse = z80_next_int_pulse;
1434 #endif 1420 #endif
1435 z80_assert_reset(gen->z80, 0); 1421 z80_assert_reset(gen->z80, 0);
1436 #else 1422 #else
1437 gen->z80 = calloc(1, sizeof(z80_context)); 1423 gen->z80 = calloc(1, sizeof(z80_context));