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WIP new 68K core using CPU DSL
author Michael Pavone <pavone@retrodev.com>
date Thu, 18 Apr 2019 19:47:50 -0700
parents
children 84b32010ef8d
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1837:f6ee0df6bb48 1838:0c1491818f4b
1 info
2 prefix m68k_
3 opcode_size 16
4 body m68k_run_op
5 header m68k.h
6 interrupt m68k_interrupt
7 include m68k_util.c
8 sync_cycle m68k_sync_cycle
9
10 declare
11 typedef m68k_context *(*m68k_reset_handler)(m68k_context *context);
12 void init_m68k_opts(m68k_options *opts, memmap_chunk * memmap, uint32_t num_chunks, uint32_t clock_divider);
13 m68k_context *init_68k_context(m68k_options * opts, m68k_reset_handler reset_handler);
14 void m68k_reset(m68k_context *context);
15 void m68k_print_regs(m68k_context *context);
16
17 regs
18 dregs 32 d0 d1 d2 d3 d4 d5 d6 d7
19 aregs 32 a0 a1 a2 a3 a4 a5 a6 a7
20 pc 32
21 other_sp 32
22 scratch1 32
23 scratch2 32
24 int_cycle 32
25 prefetch 16
26 int_priority 8
27 int_num 8
28 int_pending 8
29 int_pending_num 8
30 int_ack 8
31 status 8
32 ccr 8
33 xflag 8
34 nflag 8
35 zflag 8
36 vflag 8
37 cflag 8
38 reset_handler ptrvoid
39 mem_pointers ptrvoid 8
40
41 flags
42 register ccr
43 X 4 carry xflag
44 N 3 sign nflag
45 Z 2 zero zflag
46 V 1 overflow vflag
47 C 0 carry cflag
48
49 m68k_prefetch
50 if dynarec
51
52 ccall m68k_read16_noinc context pc
53 mov result prefetch
54
55 end
56
57 if interp
58
59 mov pc scratch1
60 ocall read_16
61 mov scratch1 prefetch
62
63 end
64
65 add 2 pc pc
66
67 check_user_mode_swap_ssp_usp
68 local tmp 8
69 and 0x20 status tmp
70 if tmp
71 else
72
73 xchg other_sp a7
74
75 end
76
77 m68k_get_sr
78 lsl status 8 scratch1
79 or ccr scratch1 scratch1
80
81 m68k_write32_lowfirst
82 arg value 32
83 add 2 scratch2 scratch2
84 mov value scratch1
85 ocall write_16
86
87 sub 2 scratch2 scratch2
88 lsr value 16 scratch1
89 ocall write_16
90
91 m68k_write32
92 arg value 32
93 local tmp 32
94 mov value tmp
95 lsr value 16 scratch1
96 ocall write_16
97
98 add 2 scratch2 scratch2
99 mov tmp scratch1
100 ocall write_16
101
102 m68k_read32
103 local tmp 32
104 add 2 scratch1 tmp
105 ocall read_16
106 xchg scratch1 tmp
107 ocall read_16
108 lsl tmp 16 tmp
109 or tmp scratch1 scratch1
110
111 m68k_interrupt
112 cmp int_cycle cycles
113 if >=U
114
115 #INT_PENDING_NONE
116 cmp 255 int_pending
117 if =
118
119 mov int_priority int_pending
120 mov int_num int_pending_num
121
122 else
123
124 #INT_PENDING_SR_CHANGE
125 cmp 254 int_pending
126 if =
127
128 mov int_priority int_pending
129 mov int_num int_pending_num
130
131 else
132
133 check_user_mode_swap_ssp_usp
134
135 cycles 6
136 #save status reg
137 sub 6 a7 a7
138 m68k_get_sr
139 mov a7 scratch2
140 ocall write_16
141
142 #update status register
143 and 0x78 status status
144 or int_priority status status
145 or 0x20 status status
146
147 #Interrupt ack cycle
148 mov int_pending int_ack
149 if int_pending_num
150 cycles 4
151 else
152 #TODO: do the whole E clock variable latency nonsense
153 cycles 13
154 add 24 int_pending int_pending_num
155 end
156
157 #save pc
158 add 2 a7 scratch2
159 m68k_write32_lowfirst pc
160
161 lsl int_pending_num 2 scratch1
162 m68k_read32
163 mov scratch1 pc
164 update_sync
165 end
166
167 m68k_run_op
168 dispatch prefetch
169
170 m68k_mem_src
171 arg address 32
172 arg size 16
173 arg isdst 8
174 mov address scratch1
175 if isdst
176 mov address scratch2
177 meta ismem 1
178 end
179 switch size
180
181 case 0
182 ocall read_8
183
184 case 1
185 ocall read_16
186
187 case 2
188 m68k_read32
189
190 end
191 meta op scratch1
192
193 m68k_write_size
194 arg size 16
195 arg lowfirst 8
196 switch size
197 case 0
198 ocall write_8
199
200 case 1
201 ocall write_16
202
203 case 2
204 if lowfirst
205 m68k_write32_lowfirst scratch1
206 else
207 m68k_write32 scratch1
208 end
209 end
210
211 m68k_index_word
212 m68k_prefetch
213 local disp 32
214 and prefetch 255 disp
215 sext 16 disp disp
216 sext 32 disp disp
217 local index 16
218 lsr prefetch 12 index
219 local isareg 16
220 and index 8 isareg
221 and index 7 index
222 local islong 16
223 and prefetch 2048 islong
224
225 switch isareg
226 case 0
227 switch islong
228 case 0
229 sext 32 dregs.index scratch1
230 case 2048
231 mov dregs.index scratch1
232 end
233 case 8
234 switch islong
235 case 0
236 sext 32 aregs.index scratch1
237 case 2048
238 mov aregs.index scratch1
239 end
240 end
241 add disp scratch1 scratch1
242
243 m68k_fetch_op_ea
244 arg mode 16
245 arg reg 16
246 arg Z 16
247 arg isdst 8
248 switch mode
249
250 case 0
251 #data reg direct
252 meta op dregs.reg
253 if isdst
254 meta ismem 0
255 end
256
257 case 1
258 #address reg direct
259 meta op aregs.reg
260 if isdst
261 meta ismem 0
262 end
263
264 case 2
265 #address reg indirect
266 m68k_mem_src aregs.reg Z isdst
267
268 case 3
269 #postincrement
270 m68k_mem_src aregs.reg Z isdst
271 switch reg
272 case 7
273 if Z
274 addsize Z aregs.reg aregs.reg
275 else
276 addsize 1 aregs.reg aregs.reg
277 end
278 default
279 addsize Z aregs.reg aregs.reg
280 end
281
282 case 4
283 #predecrement
284 switch reg
285 case 7
286 if Z
287 decsize Z aregs.reg aregs.reg
288 else
289 decsize 1 aregs.reg aregs.reg
290 end
291 default
292 decsize Z aregs.reg aregs.reg
293 end
294 cycles 2
295 m68k_mem_src aregs.reg Z isdst
296
297 case 5
298 #displacement
299 m68k_prefetch
300 sext 32 prefetch scratch1
301 add scratch1 aregs.reg scratch1
302 m68k_mem_src scratch1 Z isdst
303
304 case 6
305 #indexed
306 m68k_index_word
307 add aregs.reg scratch1 scratch1
308
309 m68k_mem_src scratch1 Z isdst
310 case 7
311 #pc-relative and absolute modes
312
313 switch reg
314 case 0
315 #absolute short
316 m68k_prefetch
317 sext 32 prefetch scratch1
318 m68k_mem_src scratch1 Z isdst
319
320 case 1
321 #absolute long
322 local address 32
323 m68k_prefetch
324 lsl prefetch 16 address
325 m68k_prefetch
326 or prefetch address scratch1
327 m68k_mem_src scratch1 Z isdst
328
329 case 2
330 #pc displaceent
331 m68k_prefetch
332 sext 32 prefetch scratch1
333 add scratch1 pc scratch1
334 sub 2 scratch1 scratch1
335 m68k_mem_src scratch1 Z isdst
336
337 case 3
338 #pc indexed
339 m68k_index_word
340 add pc scratch1 scratch1
341 sub 2 scratch1 scratch1
342 m68k_mem_src scratch1 Z isdst
343
344 case 4
345 #immediate
346 switch Z
347 case 2
348 local tmp32 32
349 m68k_prefetch
350 lsl prefetch 16 tmp32
351 m68k_prefetch
352 or prefetch tmp32 scratch1
353
354 default
355 m68k_prefetch
356 mov prefetch scratch1
357 end
358 meta op scratch1
359
360 end
361
362 end
363
364 m68k_fetch_src_ea
365 arg mode 16
366 arg reg 16
367 arg Z 16
368 m68k_fetch_op_ea mode reg Z 0
369 meta src op
370 switch mode
371 case 0
372 meta src_is_mem 0
373 case 1
374 meta src_is_mem 0
375 default
376 meta src_is_mem 1
377 end
378
379 m68k_fetch_dst_ea
380 arg mode 16
381 arg reg 16
382 arg Z 16
383 m68k_fetch_op_ea mode reg Z 1
384 meta dst op
385
386 m68k_save_dst
387 arg Z 16
388 if ismem
389 m68k_write_size Z 0
390 end
391
392 1101DDD0ZZMMMRRR add_ea_dn
393 invalid M 7 R 5
394 invalid M 7 R 6
395 invalid M 7 R 7
396 invalid Z 3
397 m68k_fetch_src_ea M R Z
398
399 add src dregs.D dregs.D Z
400 update_flags XNZVC
401 m68k_prefetch
402
403 1101DDD1ZZMMMRRR add_dn_ea
404 invalid M 7 R 2
405 invalid M 7 R 3
406 invalid M 7 R 4
407 invalid M 7 R 5
408 invalid M 7 R 6
409 invalid M 7 R 7
410 invalid Z 3
411 m68k_fetch_dst_ea M R Z
412
413 add dregs.D dst dst Z
414 update_flags XNZVC
415 m68k_save_dst Z
416 m68k_prefetch
417
418 1101AAAZ11MMMRRR adda
419 invalid M 7 R 5
420 invalid M 7 R 6
421 invalid M 7 R 7
422 local size 16
423 local ext_src 32
424 if Z
425 mov 2 size
426 else
427 mov 1 size
428 end
429 m68k_fetch_src_ea M R size
430 switch size
431 case 1
432 sext 32 src ext_src
433 meta src ext_src
434 end
435
436 add src aregs.A aregs.A
437 m68k_prefetch
438
439 00000110ZZMMMRRR addi
440 local immed 32
441 invalid Z 3
442 invalid M 7 R 2
443 invalid M 7 R 3
444 invalid M 7 R 4
445 invalid M 7 R 5
446 invalid M 7 R 6
447 invalid M 7 R 7
448 #fetch immediate operand
449 m68k_prefetch
450 switch Z
451 case 2
452 lsl prefetch 16 immed
453 m68k_prefetch
454 or prefetch immed immed
455 default
456 mov prefetch immed
457 end
458 #fetch dst EA
459 m68k_fetch_dst_ea M R Z
460
461 add immed dst dst Z
462 update_flags XNZVC
463 m68k_save_dst Z
464 m68k_prefetch
465
466 0101III0ZZMMMRRR addq
467 invalid Z 3
468 invalid M 7 R 2
469 invalid M 7 R 3
470 invalid M 7 R 4
471 invalid M 7 R 5
472 invalid M 7 R 6
473 invalid M 7 R 7
474 local src 32
475 switch I
476 case 0
477 mov 8 src
478 default
479 mov I src
480 end
481
482 m68k_fetch_dst_ea M R Z
483 switch M
484 case 1
485 add src dst dst Z
486 default
487 add src dst dst Z
488 update_flags XNZVC
489 end
490 m68k_save_dst Z
491 m68k_prefetch
492
493 1101DDD1ZZ000SSS addx_dy_dx
494 invalid Z 3
495 adc dregs.S dregs.D dregs.D Z
496 update_flags XNVC
497 switch Z
498 case 0
499 local tmp8 8
500 mov dregs.D tmp8
501 if tmp8
502 update_flags Z0
503 end
504 case 1
505 local tmp16 16
506 mov dregs.D tmp16
507 if tmp16
508 update_flags Z0
509 end
510 case 2
511 if dregs.D
512 update_flags Z0
513 end
514 end
515 m68k_prefetch
516
517 1101DDD1ZZ001SSS addx_ay_ax
518 invalid Z 3
519 if Z
520 decsize Z aregs.S aregs.S
521 else
522 switch S
523 case 7
524 sub 2 aregs.S aregs.S
525 default
526 decsize Z aregs.S aregs.S
527 end
528 end
529 mov aregs.S scratch1
530 switch Z
531 case 0
532 ocall read_8
533 case 1
534 ocall read_16
535 case 2
536 m68k_read32
537 end
538 mov scratch1 scratch2
539 if Z
540 decsize Z aregs.D aregs.D
541 else
542 switch D
543 case 7
544 sub 2 aregs.D aregs.D
545 default
546 decsize Z aregs.D aregs.D
547 end
548 end
549 mov aregs.D scratch1
550 switch Z
551 case 0
552 ocall read_8
553 case 1
554 ocall read_16
555 case 2
556 m68k_read32
557 end
558 adc scratch2 scratch1 scratch1 Z
559 update_flags XNVC
560 switch Z
561 case 0
562 local tmp8 8
563 mov dregs.D tmp8
564 if tmp8
565 update_flags Z0
566 end
567 case 1
568 local tmp16 16
569 mov dregs.D tmp16
570 if tmp16
571 update_flags Z0
572 end
573 case 2
574 if dregs.D
575 update_flags Z0
576 end
577 end
578 mov aregs.D scratch2
579 m68k_write_size Z 0
580 m68k_prefetch
581
582
583 00ZZRRRMMMEEESSS move
584 invalid Z 0
585 invalid M 1
586 invalid M 7 #not actually invalid, but will be handled separately due to DSL limitations
587 invalid E 7 S 5
588 invalid E 7 S 6
589 invalid E 7 S 7
590 local size 8
591 local memsrc 32
592 #move uses a different size format than most instructions
593 switch Z
594 case 1
595 mov 0 size
596 case 2
597 mov 2 size
598 case 3
599 mov 1 size
600 end
601 m68k_fetch_src_ea E S size
602
603 if src_is_mem
604 #avoid clobbering src if we need scratch1
605 mov src memsrc
606 meta src memsrc
607 end
608
609 cmp 0 src size
610 update_flags NZV0C0
611
612 switch M
613 case 0
614 mov src dregs.R size
615
616 case 2
617 mov aregs.R scratch2
618 mov src scratch1
619 m68k_write_size size 0
620
621 case 3
622 mov aregs.R scratch2
623 mov src scratch1
624 switch R
625 case 7
626 if size
627 addsize size aregs.R aregs.R
628 else
629 addsize 1 aregs.R aregs.R
630 end
631 default
632 addsize size aregs.R aregs.R
633 end
634 m68k_write_size size 0
635
636 case 4
637 mov src scratch1
638 switch R
639 case 7
640 if size
641 decsize size aregs.R aregs.R
642 else
643 decsize 1 aregs.R aregs.R
644 end
645 default
646 decsize size aregs.R aregs.R
647 end
648 mov aregs.R scratch2
649 m68k_write_size size 1
650
651 case 5
652 m68k_prefetch
653 sext 32 prefetch scratch2
654 add aregs.R scratch2 scratch2
655 mov src scratch1
656 m68k_write_size size 0
657
658 case 6
659 m68k_index_word
660 add aregs.R scratch1 scratch2
661 mov src scratch1
662 m68k_write_size size 0
663 end
664 m68k_prefetch
665
666
667 00ZZ00M111EEESSS move_abs
668 invalid E 7 S 5
669 invalid E 7 S 6
670 invalid E 7 S 7
671 invalid Z 0
672 local size 8
673 local memsrc 32
674 #move uses a different size format than most instructions
675 switch Z
676 case 1
677 mov 0 size
678 case 2
679 mov 2 size
680 case 3
681 mov 1 size
682 end
683 m68k_fetch_src_ea E S size
684
685 if src_is_mem
686 #avoid clobbering src if we need scratch1
687 mov src memsrc
688 meta src memsrc
689 end
690
691 cmp 0 src size
692 update_flags NZV0C0
693
694 switch M
695 case 0
696 m68k_prefetch
697 sext 32 prefetch scratch2
698
699 case 1
700 m68k_prefetch
701 lsl prefetch 16 scratch2
702 m68k_prefetch
703 or prefetch scratch2 scratch2
704 end
705 mov src scratch1
706 m68k_write_size size 0
707 m68k_prefetch
708
709 00ZZRRR001EEESSS movea
710 local size 8
711 invalid Z 0
712 invalid Z 1
713 invalid E 7 S 5
714 invalid E 7 S 6
715 invalid E 7 S 7
716 switch Z
717 case 2
718 mov 2 size
719 case 3
720 mov 1 size
721 end
722 m68k_fetch_src_ea E S size
723 switch Z
724 case 2
725 mov src aregs.R
726 case 3
727 sext 32 src aregs.R
728 end
729 m68k_prefetch
730
731 0100010011MMMRRR move_to_ccr
732 invalid M 1
733 invalid M 7 R 5
734 invalid M 7 R 6
735 invalid M 7 R 7
736 m68k_fetch_src_ea M R 1
737 mov scratch1 ccr
738 m68k_prefetch
739
740 0100011011MMMRRR move_to_sr
741 invalid M 1
742 invalid M 7 R 5
743 invalid M 7 R 6
744 invalid M 7 R 7
745 m68k_fetch_src_ea M R 1
746 mov scratch1 ccr
747 lsr scratch1 8 status
748 update_sync
749 m68k_prefetch
750
751 0100000011MMMRRR move_from_sr
752 invalid M 1
753 invalid M 7 R 2
754 invalid M 7 R 3
755 invalid M 7 R 4
756 invalid M 7 R 5
757 invalid M 7 R 6
758 invalid M 7 R 7
759 m68k_fetch_dst_ea M R 1
760 lsl status 8 scratch1
761 or ccr scratch1 scratch1
762 mov scratch1 dst
763 m68k_save_dst 1
764 m68k_prefetch
765
766 0100111001110000 reset
767 cycles 124
768 if reset_handler
769 pcall reset_handler m68k_reset_handler context
770 end