Mercurial > repos > blastem
comparison cdd_mcu.c @ 2139:11a3d5b00a66
Fix DRS and DTS bits of CDD status
author | Michael Pavone <pavone@retrodev.com> |
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date | Sun, 20 Mar 2022 13:55:31 -0700 |
parents | 28b6453cf7e3 |
children | 793715149f16 |
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2138:b6338e18787e | 2139:11a3d5b00a66 |
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567 context->last_sector_cycle = context->cycle; | 567 context->last_sector_cycle = context->cycle; |
568 next_subcode = context->cycle + SECTOR_CLOCKS; | 568 next_subcode = context->cycle + SECTOR_CLOCKS; |
569 update_status(context, gate_array); | 569 update_status(context, gate_array); |
570 next_nibble = context->cycle + PROCESSING_DELAY; | 570 next_nibble = context->cycle + PROCESSING_DELAY; |
571 context->current_status_nibble = 0; | 571 context->current_status_nibble = 0; |
572 gate_array[GAO_CDD_STATUS] |= BIT_DRS; | |
573 if (context->next_subcode_int_cycle != CYCLE_NEVER) { | 572 if (context->next_subcode_int_cycle != CYCLE_NEVER) { |
574 context->subcode_int_pending = 1; | 573 context->subcode_int_pending = 1; |
575 } | 574 } |
576 if ((context->status == DS_PLAY || context->status == DS_PAUSE) && context->head_pba >= LEADIN_SECTORS) { | 575 if ((context->status == DS_PLAY || context->status == DS_PAUSE) && context->head_pba >= LEADIN_SECTORS) { |
577 context->current_sector_byte = 0; | 576 context->current_sector_byte = 0; |
583 } | 582 } |
584 } | 583 } |
585 if (context->cycle >= next_nibble) { | 584 if (context->cycle >= next_nibble) { |
586 if (context->current_status_nibble == sizeof(cdd_status)) { | 585 if (context->current_status_nibble == sizeof(cdd_status)) { |
587 context->current_status_nibble = -1; | 586 context->current_status_nibble = -1; |
588 gate_array[GAO_CDD_STATUS] &= ~BIT_DRS; | 587 gate_array[GAO_CDD_CTRL] &= ~BIT_DRS; |
589 if (context->cmd_recv_pending) { | 588 if (context->cmd_recv_pending) { |
590 context->cmd_recv_pending = 0; | 589 context->cmd_recv_pending = 0; |
591 context->current_cmd_nibble = 0; | 590 context->current_cmd_nibble = 0; |
592 gate_array[GAO_CDD_STATUS] |= BIT_DTS; | 591 gate_array[GAO_CDD_CTRL] |= BIT_DTS; |
593 next_cmd_nibble = context->cycle + NIBBLE_CLOCKS; | 592 next_cmd_nibble = context->cycle + NIBBLE_CLOCKS; |
594 } else { | 593 } else { |
595 context->cmd_recv_wait = 1; | 594 context->cmd_recv_wait = 1; |
596 } | 595 } |
597 next_nibble = CYCLE_NEVER; | 596 next_nibble = CYCLE_NEVER; |
598 } else { | 597 } else { |
598 gate_array[GAO_CDD_CTRL] |= BIT_DRS; | |
599 uint8_t value = ((uint8_t *)&context->status_buffer)[context->current_status_nibble]; | 599 uint8_t value = ((uint8_t *)&context->status_buffer)[context->current_status_nibble]; |
600 int ga_index = GAO_CDD_STATUS + (context->current_status_nibble >> 1); | 600 int ga_index = GAO_CDD_STATUS + (context->current_status_nibble >> 1); |
601 if (context->current_status_nibble & 1) { | 601 if (context->current_status_nibble & 1) { |
602 gate_array[ga_index] = value | (gate_array[ga_index] & 0xFF00); | 602 gate_array[ga_index] = value | (gate_array[ga_index] & 0xFF00); |
603 } else { | 603 } else { |
613 } | 613 } |
614 } else if (context->cycle >= next_cmd_nibble) { | 614 } else if (context->cycle >= next_cmd_nibble) { |
615 if (context->current_cmd_nibble == sizeof(cdd_cmd)) { | 615 if (context->current_cmd_nibble == sizeof(cdd_cmd)) { |
616 next_cmd_nibble = CYCLE_NEVER; | 616 next_cmd_nibble = CYCLE_NEVER; |
617 context->current_cmd_nibble = -1; | 617 context->current_cmd_nibble = -1; |
618 gate_array[GAO_CDD_STATUS] &= ~BIT_DTS; | 618 gate_array[GAO_CDD_CTRL] &= ~BIT_DTS; |
619 run_command(context); | 619 run_command(context); |
620 } else { | 620 } else { |
621 int ga_index = GAO_CDD_CMD + (context->current_cmd_nibble >> 1); | 621 int ga_index = GAO_CDD_CMD + (context->current_cmd_nibble >> 1); |
622 uint8_t value = (context->current_cmd_nibble & 1) ? gate_array[ga_index] : gate_array[ga_index] >> 8; | 622 uint8_t value = (context->current_cmd_nibble & 1) ? gate_array[ga_index] : gate_array[ga_index] >> 8; |
623 ((uint8_t *)&context->cmd_buffer)[context->current_cmd_nibble] = value; | 623 ((uint8_t *)&context->cmd_buffer)[context->current_cmd_nibble] = value; |
677 } | 677 } |
678 } | 678 } |
679 | 679 |
680 void cdd_mcu_start_cmd_recv(cdd_mcu *context, uint16_t *gate_array) | 680 void cdd_mcu_start_cmd_recv(cdd_mcu *context, uint16_t *gate_array) |
681 { | 681 { |
682 if (gate_array[GAO_CDD_CTRL] & BIT_DTS) { | |
683 return; | |
684 } | |
682 if (context->cmd_recv_wait) { | 685 if (context->cmd_recv_wait) { |
683 context->current_cmd_nibble = 0; | 686 context->current_cmd_nibble = 0; |
684 gate_array[GAO_CDD_STATUS] |= BIT_DTS; | 687 gate_array[GAO_CDD_CTRL] |= BIT_DTS; |
685 context->last_nibble_cycle = context->cycle; | 688 context->last_nibble_cycle = context->cycle; |
686 context->cmd_recv_wait = 0; | 689 context->cmd_recv_wait = 0; |
687 } else { | 690 } else { |
688 context->cmd_recv_pending = 1; | 691 context->cmd_recv_pending = 1; |
689 } | 692 } |