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comparison cpu_dsl.py @ 2618:1579b840a1af

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Implement stop in new 68K core
author Michael Pavone <pavone@retrodev.com>
date Fri, 21 Feb 2025 01:45:04 -0800
parents cbd54de385d3
children ce9386a7b21e
comparison
equal deleted inserted replaced
2617:ad9e074c8901 2618:1579b840a1af
41 self.addOp(NormalOp(['cmp', parts[3], parts[1]])) 41 self.addOp(NormalOp(['cmp', parts[3], parts[1]]))
42 cond = parts[2] 42 cond = parts[2]
43 else: 43 else:
44 cond = parts[1] 44 cond = parts[1]
45 o = If(self, cond) 45 o = If(self, cond)
46 self.addOp(o)
47 return o
48 elif parts[0] == 'loop':
49 o = Loop(self, None if len(parts) == 1 else parts[1])
46 self.addOp(o) 50 self.addOp(o)
47 return o 51 return o
48 elif parts[0] == 'end': 52 elif parts[0] == 'end':
49 raise Exception('end is only allowed inside a switch or if block') 53 raise Exception('end is only allowed inside a switch or if block')
50 else: 54 else:
1282 dst = params[2], sz = params[0], val = params[1] 1286 dst = params[2], sz = params[0], val = params[1]
1283 )), 1287 )),
1284 'xchg': Op().addImplementation('c', (0,1), _xchgCImpl), 1288 'xchg': Op().addImplementation('c', (0,1), _xchgCImpl),
1285 'dispatch': Op().addImplementation('c', None, _dispatchCImpl), 1289 'dispatch': Op().addImplementation('c', None, _dispatchCImpl),
1286 'update_flags': Op().addImplementation('c', None, _updateFlagsCImpl), 1290 'update_flags': Op().addImplementation('c', None, _updateFlagsCImpl),
1287 'update_sync': Op().addImplementation('c', None, _updateSyncCImpl) 1291 'update_sync': Op().addImplementation('c', None, _updateSyncCImpl),
1292 'break': Op().addImplementation('c', None, lambda prog, params: '\n\tbreak;')
1288 } 1293 }
1289 1294
1290 #represents a simple DSL instruction 1295 #represents a simple DSL instruction
1291 class NormalOp: 1296 class NormalOp:
1292 def __init__(self, parts): 1297 def __init__(self, parts):
1681 for op in self.elseBody: 1686 for op in self.elseBody:
1682 op.processDispatch(prog) 1687 op.processDispatch(prog)
1683 1688
1684 def __str__(self): 1689 def __str__(self):
1685 lines = ['\n\tif'] 1690 lines = ['\n\tif']
1691 for op in self.body:
1692 lines.append(str(op))
1693 lines.append('\n\tend')
1694 return ''.join(lines)
1695
1696 class Loop(ChildBlock):
1697 def __init__(self, parent, count):
1698 self.op = 'loop'
1699 self.parent = parent
1700 self.count = count
1701 self.body = []
1702 self.locals = {}
1703 self.regValues = None
1704
1705 def addOp(self, op):
1706 if op.op in ('case', 'arg', 'else'):
1707 raise Exception(op + ' is not allows inside an loop block')
1708 if op.op == 'local':
1709 name = op.params[0]
1710 size = op.params[1]
1711 self.locals[name] = size
1712 else:
1713 self.body.append(op)
1714
1715 def localSize(self, name):
1716 return self.locals.get(name)
1717
1718 def resolveLocal(self, name):
1719 if name in self.locals:
1720 return name
1721 return self.parent.resolveLocal(name)
1722
1723 def processDispatch(self, prog):
1724 for op in self.body:
1725 op.processDispatch(prog)
1726
1727 def generate(self, prog, parent, fieldVals, output, otype, flagUpdates):
1728 self.regValues = parent.regValues
1729 if self.count:
1730 count = prog.resolveParam(self.count, self, fieldVals)
1731 output.append('\n\tfor (uint32_t loop_counter__ = 0; loop_counter__ < {count}; loop_counter__++) {')
1732 else:
1733 output.append('\n\tfor (;;) {')
1734 self.processOps(prog, fieldVals, output, otype, self.body)
1735 output.append('\n\t}')
1736
1737 def __str__(self):
1738 lines = ['\n\tloop']
1739 if self.count:
1740 lines[0] += f' {self.count}'
1686 for op in self.body: 1741 for op in self.body:
1687 lines.append(str(op)) 1742 lines.append(str(op))
1688 lines.append('\n\tend') 1743 lines.append('\n\tend')
1689 return ''.join(lines) 1744 return ''.join(lines)
1690 1745