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comparison m68k_to_x86.c @ 442:1a48b31f5316

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Fix carry flag on rotate when the register provided rotate bit count is exactly 32
author Mike Pavone <pavone@retrodev.com>
date Wed, 17 Jul 2013 00:18:28 -0700
parents 306986209cba
children 9ac3828ea560
comparison
equal deleted inserted replaced
441:112d5d0830fd 442:1a48b31f5316
3555 dst = add_rr(dst, SCRATCH1, CYCLES, SZ_D); 3555 dst = add_rr(dst, SCRATCH1, CYCLES, SZ_D);
3556 dst = add_rr(dst, SCRATCH1, CYCLES, SZ_D); 3556 dst = add_rr(dst, SCRATCH1, CYCLES, SZ_D);
3557 dst = cmp_ir(dst, 32, SCRATCH1, SZ_B); 3557 dst = cmp_ir(dst, 32, SCRATCH1, SZ_B);
3558 norm_off = dst+1; 3558 norm_off = dst+1;
3559 dst = jcc(dst, CC_L, dst+2); 3559 dst = jcc(dst, CC_L, dst+2);
3560 dst = sub_ir(dst, 32, SCRATCH1, SZ_B);
3560 if (dst_op.mode == MODE_REG_DIRECT) { 3561 if (dst_op.mode == MODE_REG_DIRECT) {
3561 if (inst->op == M68K_ROL) { 3562 if (inst->op == M68K_ROL) {
3562 dst = rol_ir(dst, 31, dst_op.base, inst->extra.size); 3563 dst = rol_ir(dst, 31, dst_op.base, inst->extra.size);
3563 dst = rol_ir(dst, 1, dst_op.base, inst->extra.size); 3564 dst = rol_ir(dst, 1, dst_op.base, inst->extra.size);
3564 } else { 3565 } else {
3572 } else { 3573 } else {
3573 dst = ror_irdisp8(dst, 31, dst_op.base, dst_op.disp, inst->extra.size); 3574 dst = ror_irdisp8(dst, 31, dst_op.base, dst_op.disp, inst->extra.size);
3574 dst = ror_irdisp8(dst, 1, dst_op.base, dst_op.disp, inst->extra.size); 3575 dst = ror_irdisp8(dst, 1, dst_op.base, dst_op.disp, inst->extra.size);
3575 } 3576 }
3576 } 3577 }
3577 dst = sub_ir(dst, 32, SCRATCH1, SZ_B);
3578 *norm_off = dst - (norm_off+1); 3578 *norm_off = dst - (norm_off+1);
3579 if (dst_op.mode == MODE_REG_DIRECT) { 3579 if (dst_op.mode == MODE_REG_DIRECT) {
3580 if (inst->op == M68K_ROL) { 3580 if (inst->op == M68K_ROL) {
3581 dst = rol_clr(dst, dst_op.base, inst->extra.size); 3581 dst = rol_clr(dst, dst_op.base, inst->extra.size);
3582 } else { 3582 } else {