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comparison m68k_to_x86.c @ 106:1eba2b9455f8

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Implement ORI to CCR/SR
author Mike Pavone <pavone@retrodev.com>
date Fri, 28 Dec 2012 11:07:13 -0800
parents 1a0fd122ca8f
children 9705075fcf36
comparison
equal deleted inserted replaced
105:1a0fd122ca8f 106:1eba2b9455f8
2035 dst = setcc_r(dst, CC_Z, FLAG_Z); 2035 dst = setcc_r(dst, CC_Z, FLAG_Z);
2036 dst = setcc_r(dst, CC_S, FLAG_N); 2036 dst = setcc_r(dst, CC_S, FLAG_N);
2037 dst = mov_ir(dst, 0, FLAG_V, SZ_B); 2037 dst = mov_ir(dst, 0, FLAG_V, SZ_B);
2038 dst = m68k_save_result(inst, dst, opts); 2038 dst = m68k_save_result(inst, dst, opts);
2039 break; 2039 break;
2040 /*case M68K_ORI_CCR: 2040 case M68K_ORI_CCR:
2041 case M68K_ORI_SR: 2041 case M68K_ORI_SR:
2042 case M68K_PEA: 2042 dst = cycles(dst, 20);
2043 //TODO: If ANDI to SR, trap if not in supervisor mode
2044 if (inst->src.params.immed & 0x1) {
2045 dst = mov_ir(dst, 1, FLAG_C, SZ_B);
2046 }
2047 if (inst->src.params.immed & 0x2) {
2048 dst = mov_ir(dst, 1, FLAG_V, SZ_B);
2049 }
2050 if (inst->src.params.immed & 0x4) {
2051 dst = mov_ir(dst, 1, FLAG_Z, SZ_B);
2052 }
2053 if (inst->src.params.immed & 0x8) {
2054 dst = mov_ir(dst, 1, FLAG_N, SZ_B);
2055 }
2056 if (inst->src.params.immed & 0x10) {
2057 dst = mov_irind(dst, 1, CONTEXT, SZ_B);
2058 }
2059 if (inst->op == M68K_ANDI_SR) {
2060 dst = or_irdisp8(dst, inst->src.params.immed >> 8, CONTEXT, offsetof(m68k_context, status), SZ_B);
2061 }
2062 break;
2063 /*case M68K_PEA:
2043 case M68K_RESET: 2064 case M68K_RESET:
2044 case M68K_ROL: 2065 case M68K_ROL:
2045 case M68K_ROR: 2066 case M68K_ROR:
2046 case M68K_ROXL: 2067 case M68K_ROXL:
2047 case M68K_ROXR:*/ 2068 case M68K_ROXR:*/