Mercurial > repos > blastem
comparison musashi/m68kcpu.h @ 1507:2455662378ed mame_interp
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
author | Michael Pavone <pavone@retrodev.com> |
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date | Sat, 30 Dec 2017 18:27:06 -0800 |
parents | ded16f3d7eb4 |
children | 2e57910fd641 |
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1506:ded16f3d7eb4 | 1507:2455662378ed |
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37 uint32_t n_flag; /* Negative */ | 37 uint32_t n_flag; /* Negative */ |
38 uint32_t not_z_flag; /* Zero, inverted for speedups */ | 38 uint32_t not_z_flag; /* Zero, inverted for speedups */ |
39 uint32_t v_flag; /* Overflow */ | 39 uint32_t v_flag; /* Overflow */ |
40 uint32_t c_flag; /* Carry */ | 40 uint32_t c_flag; /* Carry */ |
41 uint32_t int_mask; /* I0-I2 */ | 41 uint32_t int_mask; /* I0-I2 */ |
42 uint32_t t1_flag; /* Trace 1 */ | |
43 uint32_t tracing; | |
42 uint32_t ir; | 44 uint32_t ir; |
43 uint32_t cyc_bcc_notake_b; | 45 uint32_t cyc_bcc_notake_b; |
44 uint32_t cyc_bcc_notake_w; | 46 uint32_t cyc_bcc_notake_w; |
45 uint32_t cyc_dbcc_f_noexp; | 47 uint32_t cyc_dbcc_f_noexp; |
46 uint32_t cyc_dbcc_f_exp; | 48 uint32_t cyc_dbcc_f_exp; |
269 /* ----------------------------- Configuration ---------------------------- */ | 271 /* ----------------------------- Configuration ---------------------------- */ |
270 | 272 |
271 /* These defines are dependant on the configuration defines in m68kconf.h */ | 273 /* These defines are dependant on the configuration defines in m68kconf.h */ |
272 | 274 |
273 /* Disable certain comparisons if we're not using all CPU types */ | 275 /* Disable certain comparisons if we're not using all CPU types */ |
274 #define CPU_TYPE_IS_COLDFIRE(A) ((A) & (CPU_TYPE_COLDFIRE)) | 276 #define CPU_TYPE_IS_COLDFIRE(A) 0//((A) & (CPU_TYPE_COLDFIRE)) |
275 | 277 |
276 #define CPU_TYPE_IS_040_PLUS(A) ((A) & (CPU_TYPE_040 | CPU_TYPE_EC040)) | 278 #define CPU_TYPE_IS_040_PLUS(A) 0//((A) & (CPU_TYPE_040 | CPU_TYPE_EC040)) |
277 #define CPU_TYPE_IS_040_LESS(A) 1 | 279 #define CPU_TYPE_IS_040_LESS(A) 1 |
278 | 280 |
279 #define CPU_TYPE_IS_030_PLUS(A) ((A) & (CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040)) | 281 #define CPU_TYPE_IS_030_PLUS(A) 0//((A) & (CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040)) |
280 #define CPU_TYPE_IS_030_LESS(A) 1 | 282 #define CPU_TYPE_IS_030_LESS(A) 1 |
281 | 283 |
282 #define CPU_TYPE_IS_020_PLUS(A) ((A) & (CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)) | 284 #define CPU_TYPE_IS_020_PLUS(A) 0//((A) & (CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)) |
283 #define CPU_TYPE_IS_020_LESS(A) 1 | 285 #define CPU_TYPE_IS_020_LESS(A) 1 |
284 | 286 |
285 #define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_FSCPU32)) | 287 #define CPU_TYPE_IS_020_VARIANT(A) 0//((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_FSCPU32)) |
286 | 288 |
287 #define CPU_TYPE_IS_EC020_PLUS(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)) | 289 #define CPU_TYPE_IS_EC020_PLUS(A) 0//((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)) |
288 #define CPU_TYPE_IS_EC020_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020)) | 290 #define CPU_TYPE_IS_EC020_LESS(A) 1//((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020)) |
289 | 291 |
290 #define CPU_TYPE_IS_010(A) ((A) == CPU_TYPE_010) | 292 #define CPU_TYPE_IS_010(A) 0//((A) == CPU_TYPE_010) |
291 #define CPU_TYPE_IS_010_PLUS(A) ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)) | 293 #define CPU_TYPE_IS_010_PLUS(A) 0//((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)) |
292 #define CPU_TYPE_IS_010_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010)) | 294 #define CPU_TYPE_IS_010_LESS(A) 1//((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010)) |
293 | 295 |
294 #define CPU_TYPE_IS_000(A) ((A) == CPU_TYPE_000 || (A) == CPU_TYPE_008) | 296 #define CPU_TYPE_IS_000(A) 1//((A) == CPU_TYPE_000 || (A) == CPU_TYPE_008) |
295 | 297 |
296 | 298 |
297 /* -------------------------- EA / Operand Access ------------------------- */ | 299 /* -------------------------- EA / Operand Access ------------------------- */ |
298 | 300 |
299 /* | 301 /* |
460 (COND_EQ(M) << 2) | \ | 462 (COND_EQ(M) << 2) | \ |
461 (COND_VS(M) >> 6) | \ | 463 (COND_VS(M) >> 6) | \ |
462 (COND_CS(M) >> 8)) | 464 (COND_CS(M) >> 8)) |
463 | 465 |
464 /* Get the status register */ | 466 /* Get the status register */ |
465 #define m68ki_get_sr(M) (/*(M)->t1_flag |*/ \ | 467 #define m68ki_get_sr(M) ((M)->t1_flag | \ |
466 /*(M)->t0_flag |*/ \ | 468 /*(M)->t0_flag |*/ \ |
467 ((M)->s_flag << 11) | \ | 469 ((M)->s_flag << 11) | \ |
468 ((M)->m_flag << 11) | \ | 470 ((M)->m_flag << 11) | \ |
469 (M)->int_mask | \ | 471 (M)->int_mask | \ |
470 m68ki_get_ccr(M)) | 472 m68ki_get_ccr(M)) |
636 void m68k_cpu_execute(m68000_base_device *this); | 638 void m68k_cpu_execute(m68000_base_device *this); |
637 void m68k_reset_cpu(m68000_base_device *this); | 639 void m68k_reset_cpu(m68000_base_device *this); |
638 void m68k_init_cpu_m68000(m68000_base_device *this); | 640 void m68k_init_cpu_m68000(m68000_base_device *this); |
639 | 641 |
640 #define m68ki_trace_t0(M) | 642 #define m68ki_trace_t0(M) |
641 #define m68ki_trace_t1(M) | 643 #define m68ki_trace_t1(m68k) m68k->tracing = m68k->t1_flag |
644 /* Clear all tracing */ | |
645 #define m68ki_clear_trace(m68k) m68k->tracing = 0 | |
646 /* Cause a trace exception if we are tracing */ | |
647 #define m68ki_exception_if_trace(m68k) if(m68k->tracing) m68ki_exception_trace(m68k) | |
642 | 648 |
643 | 649 |
644 /* ======================================================================== */ | 650 /* ======================================================================== */ |
645 /* =========================== UTILITY FUNCTIONS ========================== */ | 651 /* =========================== UTILITY FUNCTIONS ========================== */ |
646 /* ======================================================================== */ | 652 /* ======================================================================== */ |
973 { | 979 { |
974 /* Mask out the "unimplemented" bits */ | 980 /* Mask out the "unimplemented" bits */ |
975 value &= m68k->sr_mask; | 981 value &= m68k->sr_mask; |
976 | 982 |
977 /* Now set the status register */ | 983 /* Now set the status register */ |
978 /* m68k->t1_flag = BIT_F(value); | 984 m68k->t1_flag = BIT_F(value); |
979 m68k->t0_flag = BIT_E(value);*/ | 985 //m68k->t0_flag = BIT_E(value); |
980 m68k->int_mask = value & 0x0700; | 986 m68k->int_mask = value & 0x0700; |
981 m68k->c.target_cycle = m68k->c.current_cycle; | 987 m68k->c.target_cycle = m68k->c.current_cycle; |
982 m68ki_set_ccr(m68k, value); | 988 m68ki_set_ccr(m68k, value); |
983 m68ki_set_sm_flag(m68k, (value >> 11) & 6); | 989 m68ki_set_sm_flag(m68k, (value >> 11) & 6); |
984 } | 990 } |
990 { | 996 { |
991 /* Mask out the "unimplemented" bits */ | 997 /* Mask out the "unimplemented" bits */ |
992 value &= m68k->sr_mask; | 998 value &= m68k->sr_mask; |
993 | 999 |
994 /* Now set the status register */ | 1000 /* Now set the status register */ |
995 /*m68k->t1_flag = BIT_F(value); | 1001 m68k->t1_flag = BIT_F(value); |
996 m68k->t0_flag = BIT_E(value);*/ | 1002 //m68k->t0_flag = BIT_E(value); |
997 m68k->int_mask = value & 0x0700; | 1003 m68k->int_mask = value & 0x0700; |
998 m68k->c.target_cycle = m68k->c.current_cycle; | 1004 m68k->c.target_cycle = m68k->c.current_cycle; |
999 m68ki_set_ccr(m68k, value); | 1005 m68ki_set_ccr(m68k, value); |
1000 m68ki_set_sm_flag_nosp(m68k, (value >> 11) & 6); | 1006 m68ki_set_sm_flag_nosp(m68k, (value >> 11) & 6); |
1001 } | 1007 } |
1015 { | 1021 { |
1016 /* Save the old status register */ | 1022 /* Save the old status register */ |
1017 uint32_t sr = m68ki_get_sr(m68k); | 1023 uint32_t sr = m68ki_get_sr(m68k); |
1018 | 1024 |
1019 /* Turn off trace flag, clear pending traces */ | 1025 /* Turn off trace flag, clear pending traces */ |
1020 /*m68k->t1_flag = m68k->t0_flag = 0; | 1026 m68k->t1_flag = 0;//m68k->t0_flag = 0; |
1021 m68ki_clear_trace(m68k);*/ | 1027 m68ki_clear_trace(m68k); |
1022 /* Enter supervisor mode */ | 1028 /* Enter supervisor mode */ |
1023 m68ki_set_s_flag(m68k, SFLAG_SET); | 1029 m68ki_set_s_flag(m68k, SFLAG_SET); |
1024 | 1030 |
1025 return sr; | 1031 return sr; |
1026 } | 1032 } |