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comparison vdp.c @ 1178:24fc305396ee

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Disable timing debug
author Michael Pavone <pavone@retrodev.com>
date Tue, 17 Jan 2017 09:18:35 -0800
parents 67e0462c30ce
children 1271b240b9c2
comparison
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1177:67e0462c30ce 1178:24fc305396ee
52 #define BORDER_BOT_V24_PAL 48 52 #define BORDER_BOT_V24_PAL 48
53 #define BORDER_BOT_V28_PAL 32 53 #define BORDER_BOT_V28_PAL 32
54 #define BORDER_BOT_V30_PAL 24 54 #define BORDER_BOT_V30_PAL 24
55 55
56 #define INVALID_LINE 0x200 56 #define INVALID_LINE 0x200
57 #define TIMING_DEBUG
58 57
59 static int32_t color_map[1 << 12]; 58 static int32_t color_map[1 << 12];
60 static uint16_t mode4_address_map[0x4000]; 59 static uint16_t mode4_address_map[0x4000];
61 static uint32_t planar_to_chunky[256]; 60 static uint32_t planar_to_chunky[256];
62 static uint8_t levels[] = {0, 27, 49, 71, 87, 103, 119, 130, 146, 157, 174, 190, 206, 228, 255}; 61 static uint8_t levels[] = {0, 27, 49, 71, 87, 103, 119, 130, 146, 157, 174, 190, 206, 228, 255};