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Refactor duplicated CRAM writing code and fix a bug in the process
author Mike Pavone <pavone@retrodev.com>
date Sun, 30 Jun 2013 21:45:23 -0700
parents add9e2f5c0e3
children e341fd5aa996
comparison
equal deleted inserted replaced
426:add9e2f5c0e3 427:2802318c14e1
295 context->flags |= FLAG_DOT_OFLOW; 295 context->flags |= FLAG_DOT_OFLOW;
296 } 296 }
297 } 297 }
298 } 298 }
299 299
300 void write_cram(vdp_context * context, uint16_t address, uint16_t value)
301 {
302 uint16_t addr = (address/2) & (CRAM_SIZE-1);
303 context->cram[addr] = value;
304 context->colors[addr] = color_map[value & 0xEEE];
305 context->colors[addr + CRAM_SIZE] = color_map[(value & 0xEEE) | FBUF_SHADOW];
306 context->colors[addr + CRAM_SIZE*2] = color_map[(value & 0xEEE) | FBUF_HILIGHT];
307 }
308
300 #define VRAM_READ 0 309 #define VRAM_READ 0
301 #define VRAM_WRITE 1 310 #define VRAM_WRITE 1
302 #define CRAM_READ 8 311 #define CRAM_READ 8
303 #define CRAM_WRITE 3 312 #define CRAM_WRITE 3
304 #define VSRAM_READ 4 313 #define VSRAM_READ 4
328 context->vdpmem[context->address] = context->dma_val >> 8; 337 context->vdpmem[context->address] = context->dma_val >> 8;
329 context->flags |= FLAG_DMA_PROG; 338 context->flags |= FLAG_DMA_PROG;
330 } 339 }
331 break; 340 break;
332 case CRAM_WRITE: { 341 case CRAM_WRITE: {
333 uint16_t addr = (context->address/2) & (CRAM_SIZE-1), value; 342 write_cram(context, context->address, read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]));
334 context->cram[addr] = value = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]);
335 context->colors[addr] = color_map[value & 0xEEE];
336 context->colors[addr + CRAM_SIZE] = color_map[(value & 0xEEE) | FBUF_SHADOW];
337 context->colors[addr + CRAM_SIZE*2] = color_map[(value & 0xEEE) | FBUF_HILIGHT];
338 //printf("CRAM DMA | %X set to %X from %X at %d\n", (context->address/2) & (CRAM_SIZE-1), context->cram[(context->address/2) & (CRAM_SIZE-1)], (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->cycles); 343 //printf("CRAM DMA | %X set to %X from %X at %d\n", (context->address/2) & (CRAM_SIZE-1), context->cram[(context->address/2) & (CRAM_SIZE-1)], (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->cycles);
339 break; 344 break;
340 } 345 }
341 case VSRAM_WRITE: 346 case VSRAM_WRITE:
342 if (((context->address/2) & 63) < VSRAM_SIZE) { 347 if (((context->address/2) & 63) < VSRAM_SIZE) {
352 case VRAM_WRITE: 357 case VRAM_WRITE:
353 //Charles MacDonald's VDP doc says that the low byte gets written first 358 //Charles MacDonald's VDP doc says that the low byte gets written first
354 context->vdpmem[context->address] = context->dma_val; 359 context->vdpmem[context->address] = context->dma_val;
355 context->dma_val = (context->dma_val << 8) | ((context->dma_val >> 8) & 0xFF); 360 context->dma_val = (context->dma_val << 8) | ((context->dma_val >> 8) & 0xFF);
356 break; 361 break;
357 case CRAM_WRITE: { 362 case CRAM_WRITE:
358 uint16_t addr = (context->address/2) & (CRAM_SIZE-1); 363 write_cram(context, context->address, context->dma_val);
359 context->cram[addr] = context->dma_val;
360 context->colors[addr] = color_map[context->dma_val & 0xEEE];
361 context->colors[addr + CRAM_SIZE] = color_map[(context->dma_val & 0xEEE) | FBUF_SHADOW];
362 context->colors[addr + CRAM_SIZE*2] = color_map[(context->dma_val & 0xEEE) | FBUF_HILIGHT];
363 //printf("CRAM DMA Fill | %X set to %X at %d\n", (context->address/2) & (CRAM_SIZE-1), context->cram[(context->address/2) & (CRAM_SIZE-1)], context->cycles); 364 //printf("CRAM DMA Fill | %X set to %X at %d\n", (context->address/2) & (CRAM_SIZE-1), context->cram[(context->address/2) & (CRAM_SIZE-1)], context->cycles);
364 break; 365 break;
365 }
366 case VSRAM_WRITE: 366 case VSRAM_WRITE:
367 if (((context->address/2) & 63) < VSRAM_SIZE) { 367 if (((context->address/2) & 63) < VSRAM_SIZE) {
368 context->vsram[(context->address/2) & 63] = context->dma_val; 368 context->vsram[(context->address/2) & 63] = context->dma_val;
369 } 369 }
370 break; 370 break;
377 { 377 {
378 case VRAM_WRITE: 378 case VRAM_WRITE:
379 context->vdpmem[context->address] = context->dma_val; 379 context->vdpmem[context->address] = context->dma_val;
380 break; 380 break;
381 case CRAM_WRITE: { 381 case CRAM_WRITE: {
382 uint16_t addr = (context->address/2) & (CRAM_SIZE-1); 382 write_cram(context, context->address, context->dma_val);
383 context->cram[addr] = context->dma_val;
384 context->colors[addr] = color_map[context->dma_val & 0xEEE];
385 context->colors[addr + CRAM_SIZE] = color_map[(context->dma_val & 0xEEE) | FBUF_SHADOW];
386 context->colors[addr + CRAM_SIZE*2] = color_map[(context->dma_val & 0xEEE) | FBUF_HILIGHT];
387 //printf("CRAM DMA Copy | %X set to %X from %X at %d\n", (context->address/2) & (CRAM_SIZE-1), context->cram[(context->address/2) & (CRAM_SIZE-1)], context->regs[REG_DMASRC_L] & (CRAM_SIZE-1), context->cycles); 383 //printf("CRAM DMA Copy | %X set to %X from %X at %d\n", (context->address/2) & (CRAM_SIZE-1), context->cram[(context->address/2) & (CRAM_SIZE-1)], context->regs[REG_DMASRC_L] & (CRAM_SIZE-1), context->cycles);
388 break; 384 break;
389 } 385 }
390 case VSRAM_WRITE: 386 case VSRAM_WRITE:
391 if (((context->address/2) & 63) < VSRAM_SIZE) { 387 if (((context->address/2) & 63) < VSRAM_SIZE) {
453 return; 449 return;
454 } 450 }
455 break; 451 break;
456 case CRAM_WRITE: { 452 case CRAM_WRITE: {
457 //printf("CRAM Write | %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1)); 453 //printf("CRAM Write | %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1));
458 uint16_t addr = (context->address/2) & (CRAM_SIZE-1); 454 write_cram(context, start->address, start->value);
459 context->cram[addr] = start->value;
460 context->colors[addr] = color_map[start->value & 0xEEE];
461 context->colors[addr + CRAM_SIZE] = color_map[(start->value & 0xEEE) | FBUF_SHADOW];
462 context->colors[addr + CRAM_SIZE*2] = color_map[(start->value & 0xEEE) | FBUF_HILIGHT];
463 break; 455 break;
464 } 456 }
465 case VSRAM_WRITE: 457 case VSRAM_WRITE:
466 if (((start->address/2) & 63) < VSRAM_SIZE) { 458 if (((start->address/2) & 63) < VSRAM_SIZE) {
467 //printf("VSRAM Write: %X to %X\n", start->value, context->address); 459 //printf("VSRAM Write: %X to %X\n", start->value, context->address);