comparison vdp.c @ 1422:2b34469e3f81

Change where vscroll is latched in full plane mode. Fixes Top Gear 2
author Michael Pavone <pavone@retrodev.com>
date Fri, 30 Jun 2017 00:36:18 -0700
parents b56c8c51ca5d
children 4e5797b3935a
comparison
equal deleted inserted replaced
1421:0ba6760f4c6d 1422:2b34469e3f81
1048 window_line_shift = 3; 1048 window_line_shift = 3;
1049 v_offset_mask = 0x7; 1049 v_offset_mask = 0x7;
1050 vscroll_shift = 3; 1050 vscroll_shift = 3;
1051 } 1051 }
1052 //TODO: Further research on vscroll latch behavior and the "first column bug" 1052 //TODO: Further research on vscroll latch behavior and the "first column bug"
1053 if (!column) { 1053 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
1054 if (context->regs[REG_MODE_3] & BIT_VSCROLL) { 1054 if (!column) {
1055 if (context->regs[REG_MODE_4] & BIT_H40) { 1055 if (context->regs[REG_MODE_4] & BIT_H40) {
1056 //Based on observed behavior documented by Eke-Eke, I'm guessing the VDP 1056 //Based on observed behavior documented by Eke-Eke, I'm guessing the VDP
1057 //ends up fetching the last value on the VSRAM bus in the H40 case 1057 //ends up fetching the last value on the VSRAM bus in the H40 case
1058 //getting the last latched value should be close enough for now 1058 //getting the last latched value should be close enough for now
1059 if (!vsram_off) { 1059 if (!vsram_off) {
1061 } 1061 }
1062 } else { 1062 } else {
1063 //supposedly it's always forced to 0 in the H32 case 1063 //supposedly it's always forced to 0 in the H32 case
1064 context->vscroll_latch[0] = context->vscroll_latch[1] = 0; 1064 context->vscroll_latch[0] = context->vscroll_latch[1] = 0;
1065 } 1065 }
1066 } else { 1066 } else if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
1067 context->vscroll_latch[vsram_off] = context->vsram[vsram_off]; 1067 context->vscroll_latch[vsram_off] = context->vsram[column - 2 + vsram_off];
1068 } 1068 }
1069 } else if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
1070 context->vscroll_latch[vsram_off] = context->vsram[column - 2 + vsram_off];
1071 } 1069 }
1072 if (!vsram_off) { 1070 if (!vsram_off) {
1073 uint16_t left_col, right_col; 1071 uint16_t left_col, right_col;
1074 if (context->regs[REG_WINDOW_H] & WINDOW_RIGHT) { 1072 if (context->regs[REG_WINDOW_H] & WINDOW_RIGHT) {
1075 left_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2 + 2; 1073 left_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2 + 2;
2152 SPRITE_RENDER_H40(240) 2150 SPRITE_RENDER_H40(240)
2153 SPRITE_RENDER_H40(241) 2151 SPRITE_RENDER_H40(241)
2154 SPRITE_RENDER_H40(242) 2152 SPRITE_RENDER_H40(242)
2155 SPRITE_RENDER_H40(243) //provides "garbage" for border when plane A selected 2153 SPRITE_RENDER_H40(243) //provides "garbage" for border when plane A selected
2156 case 244: 2154 case 244:
2155 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
2156 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
2157 //See note in vdp_h32 for why this was moved out of read_map_scroll
2158 context->vscroll_latch[0] = context->vsram[0];
2159 context->vscroll_latch[1] = context->vsram[1];
2160 }
2157 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; 2161 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
2158 mask = 0; 2162 mask = 0;
2159 if (context->regs[REG_MODE_3] & 0x2) { 2163 if (context->regs[REG_MODE_3] & 0x2) {
2160 mask |= 0xF8; 2164 mask |= 0xF8;
2161 } 2165 }
2361 SPRITE_RENDER_H32(239) 2365 SPRITE_RENDER_H32(239)
2362 SPRITE_RENDER_H32(240) 2366 SPRITE_RENDER_H32(240)
2363 SPRITE_RENDER_H32(241) 2367 SPRITE_RENDER_H32(241)
2364 SPRITE_RENDER_H32(242) 2368 SPRITE_RENDER_H32(242)
2365 case 243: 2369 case 243:
2370 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
2371 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
2372 //Top Gear 2 has a very efficient HINT routine that can occassionally hit this slot with a VSRAM write
2373 //Since CRAM-updatnig HINT routines seem to indicate that my HINT latency is perhaps slightly too high
2374 //the most reasonable explanation is that vscroll is latched before this slot, but tests are needed
2375 //to confirm that one way or another
2376 context->vscroll_latch[0] = context->vsram[0];
2377 context->vscroll_latch[1] = context->vsram[1];
2378 }
2366 external_slot(context); 2379 external_slot(context);
2367 //provides "garbage" for border when plane A selected 2380 //provides "garbage" for border when plane A selected
2368 render_border_garbage( 2381 render_border_garbage(
2369 context, 2382 context,
2370 context->sprite_draw_list[context->cur_slot].address, 2383 context->sprite_draw_list[context->cur_slot].address,