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comparison vdp.c @ 995:2bc27415565b

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Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
author Michael Pavone <pavone@retrodev.com>
date Sat, 30 Apr 2016 08:37:55 -0700
parents f9ee6f746cb4
children bf63cbf1d7bb
comparison
equal deleted inserted replaced
994:4360cb5960c8 995:2bc27415565b
21 #define SCROLL_BUFFER_MASK (SCROLL_BUFFER_SIZE-1) 21 #define SCROLL_BUFFER_MASK (SCROLL_BUFFER_SIZE-1)
22 #define SCROLL_BUFFER_DRAW (SCROLL_BUFFER_SIZE/2) 22 #define SCROLL_BUFFER_DRAW (SCROLL_BUFFER_SIZE/2)
23 23
24 #define MCLKS_SLOT_H40 16 24 #define MCLKS_SLOT_H40 16
25 #define MCLKS_SLOT_H32 20 25 #define MCLKS_SLOT_H32 20
26 #define VINT_SLOT_H40 4 //21 slots before HSYNC, 16 during, 10 after 26 #define VINT_SLOT_H40 255 //21 slots before HSYNC, 16 during, 10 after
27 #define VINT_SLOT_H32 4 //old value was 23, but recent tests suggest the actual value is close to the H40 one 27 #define VINT_SLOT_H32 255 //old value was 23, but recent tests suggest the actual value is close to the H40 one
28 #define HSYNC_SLOT_H40 228 28 #define HSYNC_SLOT_H40 228
29 #define HSYNC_END_H40 (HSYNC_SLOT_H40+17) 29 #define HSYNC_END_H40 (HSYNC_SLOT_H40+17)
30 #define HSYNC_END_H32 (33 * MCLKS_SLOT_H32) 30 #define HSYNC_END_H32 (33 * MCLKS_SLOT_H32)
31 #define HBLANK_START_H40 178 //should be 179 according to Nemesis, but 178 seems to fit slightly better with my test ROM results 31 #define HBLANK_START_H40 178 //should be 179 according to Nemesis, but 178 seems to fit slightly better with my test ROM results
32 #define HBLANK_END_H40 0 //should be 5.5 according to Nemesis, but 0 seems to fit better with my test ROM results 32 #define HBLANK_END_H40 0 //should be 5.5 according to Nemesis, but 0 seems to fit better with my test ROM results
72 context->tmp_buf_a = context->linebuf + LINEBUF_SIZE; 72 context->tmp_buf_a = context->linebuf + LINEBUF_SIZE;
73 context->tmp_buf_b = context->tmp_buf_a + SCROLL_BUFFER_SIZE; 73 context->tmp_buf_b = context->tmp_buf_a + SCROLL_BUFFER_SIZE;
74 context->sprite_draws = MAX_DRAWS; 74 context->sprite_draws = MAX_DRAWS;
75 context->fifo_write = 0; 75 context->fifo_write = 0;
76 context->fifo_read = -1; 76 context->fifo_read = -1;
77 context->regs[REG_HINT] = context->hint_counter = 0xFF;
77 78
78 if (!color_map_init_done) { 79 if (!color_map_init_done) {
79 uint8_t b,g,r; 80 uint8_t b,g,r;
80 for (uint16_t color = 0; color < (1 << 12); color++) { 81 for (uint16_t color = 0; color < (1 << 12); color++) {
81 if (color & FBUF_SHADOW) { 82 if (color & FBUF_SHADOW) {
330 printf("\n**Internal Group**\n" 331 printf("\n**Internal Group**\n"
331 "Address: %X\n" 332 "Address: %X\n"
332 "CD: %X - %s\n" 333 "CD: %X - %s\n"
333 "Pending: %s\n" 334 "Pending: %s\n"
334 "VCounter: %d\n" 335 "VCounter: %d\n"
335 "HCounter: %d\n", 336 "HCounter: %d\n"
337 "VINT Pending: %s\n"
338 "HINT Pending: %s\n"
339 "Status: %X\n",
336 context->address, context->cd, cd_name(context->cd), (context->flags & FLAG_PENDING) ? "true" : "false", 340 context->address, context->cd, cd_name(context->cd), (context->flags & FLAG_PENDING) ? "true" : "false",
337 context->vcounter, context->hslot*2); 341 context->vcounter, context->hslot*2, (context->flags2 & FLAG2_VINT_PENDING) ? "true" : "false",
342 (context->flags2 & FLAG2_HINT_PENDING) ? "true" : "false", vdp_control_port_read(context));
338 343
339 //TODO: Window Group, DMA Group 344 //TODO: Window Group, DMA Group
340 } 345 }
341 346
342 void scan_sprite_table(uint32_t line, vdp_context * context) 347 void scan_sprite_table(uint32_t line, vdp_context * context)
1947 uint32_t vdp_next_vint_z80(vdp_context * context) 1952 uint32_t vdp_next_vint_z80(vdp_context * context)
1948 { 1953 {
1949 uint32_t inactive_start = context->latched_mode & BIT_PAL ? PAL_INACTIVE_START : NTSC_INACTIVE_START; 1954 uint32_t inactive_start = context->latched_mode & BIT_PAL ? PAL_INACTIVE_START : NTSC_INACTIVE_START;
1950 if (context->vcounter == inactive_start) { 1955 if (context->vcounter == inactive_start) {
1951 if (context->regs[REG_MODE_4] & BIT_H40) { 1956 if (context->regs[REG_MODE_4] & BIT_H40) {
1952 if (context->hslot >= LINE_CHANGE_H40) { 1957 if (context->hslot >= LINE_CHANGE_H40 && context->hslot <= VINT_SLOT_H40) {
1953 return context->cycles + vdp_cycles_hslot_wrap_h40(context) + VINT_SLOT_H40 * MCLKS_SLOT_H40; 1958 uint32_t cycles = context->cycles;
1954 } else if (context->hslot <= VINT_SLOT_H40) { 1959 if (context->hslot < 182) {
1955 return context->cycles + (VINT_SLOT_H40 - context->hslot) * MCLKS_SLOT_H40; 1960 cycles += (182 - context->hslot) * MCLKS_SLOT_H40;
1956 } 1961 }
1957 } else { 1962
1958 if (context->hslot >= LINE_CHANGE_H32) { 1963 if (context->hslot < 229) {
1959 if (context->hslot < 148) { 1964 cycles += h40_hsync_cycles[0];
1960 return context->cycles + (VINT_SLOT_H32 + 148 - context->hslot + 256 - 233) * MCLKS_SLOT_H32; 1965 }
1966 for (int slot = context->hslot <= 229 ? 229 : context->hslot; slot < HSYNC_END_H40; slot++ )
1967 {
1968 cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];
1969 }
1970 cycles += (VINT_SLOT_H40 - (context->hslot > HSYNC_SLOT_H40 ? context->hslot : HSYNC_SLOT_H40)) * MCLKS_SLOT_H40;
1971 return cycles;
1972 }
1973 } else {
1974 if (context->hslot >= LINE_CHANGE_H32 && context->hslot <= VINT_SLOT_H32) {
1975 if (context->hslot < 233) {
1976 return context->cycles + (148 - context->hslot + VINT_SLOT_H40 - 233) * MCLKS_SLOT_H32;
1961 } else { 1977 } else {
1962 return context->cycles + (VINT_SLOT_H32 + 256 - context->hslot) * MCLKS_SLOT_H32; 1978 return context->cycles + (VINT_SLOT_H32 - context->hslot) * MCLKS_SLOT_H32;
1963 } 1979 }
1964 } else if (context->hslot <= VINT_SLOT_H32) {
1965 return context->cycles + (VINT_SLOT_H32 - context->hslot) * MCLKS_SLOT_H32;
1966 } 1980 }
1967 } 1981 }
1968 } 1982 }
1969 int32_t cycles_to_vint = vdp_cycles_to_line(context, inactive_start); 1983 int32_t cycles_to_vint = vdp_cycles_to_line(context, inactive_start);
1970 if (context->regs[REG_MODE_4] & BIT_H40) { 1984 if (context->regs[REG_MODE_4] & BIT_H40) {
1971 cycles_to_vint += MCLKS_LINE - (LINE_CHANGE_H40 - VINT_SLOT_H40) * MCLKS_SLOT_H40; 1985 cycles_to_vint += MCLKS_LINE - (LINE_CHANGE_H40 + (256 - VINT_SLOT_H40)) * MCLKS_SLOT_H40;
1972 } else { 1986 } else {
1973 cycles_to_vint += (VINT_SLOT_H32 + 148 - LINE_CHANGE_H32 + 256 - 233) * MCLKS_SLOT_H32; 1987 cycles_to_vint += (VINT_SLOT_H32 - 233 + 148 - LINE_CHANGE_H32) * MCLKS_SLOT_H32;
1974 } 1988 }
1975 return context->cycles + cycles_to_vint; 1989 return context->cycles + cycles_to_vint;
1976 } 1990 }
1977 1991
1978 void vdp_int_ack(vdp_context * context) 1992 void vdp_int_ack(vdp_context * context)