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comparison genesis.c @ 1364:30123ca5856c

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Added some code to try and prevent Z80 accesses and refresh cycles from screwing up interrupt latency more than on hardware
author Michael Pavone <pavone@retrodev.com>
date Fri, 19 May 2017 20:54:04 -0700
parents 040c5600e2d9
children 5b20840711c1
comparison
equal deleted inserted replaced
1363:df6af7187b36 1364:30123ca5856c
93 context->target_cycle = context->current_cycle; 93 context->target_cycle = context->current_cycle;
94 } else if (context->target_cycle < context->current_cycle) { 94 } else if (context->target_cycle < context->current_cycle) {
95 //Changes to SR can result in an interrupt cycle that's in the past 95 //Changes to SR can result in an interrupt cycle that's in the past
96 //This can cause issues with the implementation of STOP though 96 //This can cause issues with the implementation of STOP though
97 context->target_cycle = context->current_cycle; 97 context->target_cycle = context->current_cycle;
98 }
99 if (context->target_cycle == context->int_cycle) {
100 //Currently delays from Z80 access and refresh are applied only when we sync
101 //this can cause extra latency when it comes to interrupts
102 //to prevent this code forces some extra synchronization in the period immediately before an interrupt
103 if ((context->target_cycle - context->current_cycle) > gen->int_latency_prev1) {
104 context->target_cycle = context->sync_cycle = context->int_cycle - gen->int_latency_prev1;
105 } else if ((context->target_cycle - context->current_cycle) > gen->int_latency_prev2) {
106 context->target_cycle = context->sync_cycle = context->int_cycle - gen->int_latency_prev2;
107 } else {
108 context->target_cycle = context->sync_cycle = context->current_cycle;
109 }
110
98 } 111 }
99 /*printf("Cyc: %d, Trgt: %d, Int Cyc: %d, Int: %d, Mask: %X, V: %d, H: %d, HICount: %d, HReg: %d, Line: %d\n", 112 /*printf("Cyc: %d, Trgt: %d, Int Cyc: %d, Int: %d, Mask: %X, V: %d, H: %d, HICount: %d, HReg: %d, Line: %d\n",
100 context->current_cycle, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7), 113 context->current_cycle, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7),
101 v_context->regs[REG_MODE_2] & 0x20, v_context->regs[REG_MODE_1] & 0x10, v_context->hint_counter, v_context->regs[REG_HINT], v_context->cycles / MCLKS_LINE);*/ 114 v_context->regs[REG_MODE_2] & 0x20, v_context->regs[REG_MODE_1] & 0x10, v_context->hint_counter, v_context->regs[REG_HINT], v_context->cycles / MCLKS_LINE);*/
102 } 115 }
1001 init_vdp_context(gen->vdp, gen->version_reg & 0x40); 1014 init_vdp_context(gen->vdp, gen->version_reg & 0x40);
1002 gen->vdp->system = &gen->header; 1015 gen->vdp->system = &gen->header;
1003 gen->frame_end = vdp_cycles_to_frame_end(gen->vdp); 1016 gen->frame_end = vdp_cycles_to_frame_end(gen->vdp);
1004 char * config_cycles = tern_find_path(config, "clocks\0max_cycles\0", TVAL_PTR).ptrval; 1017 char * config_cycles = tern_find_path(config, "clocks\0max_cycles\0", TVAL_PTR).ptrval;
1005 gen->max_cycles = config_cycles ? atoi(config_cycles) : DEFAULT_SYNC_INTERVAL; 1018 gen->max_cycles = config_cycles ? atoi(config_cycles) : DEFAULT_SYNC_INTERVAL;
1019 gen->int_latency_prev1 = MCLKS_PER_68K * 32;
1020 gen->int_latency_prev2 = MCLKS_PER_68K * 16;
1006 1021
1007 char * lowpass_cutoff_str = tern_find_path(config, "audio\0lowpass_cutoff\0", TVAL_PTR).ptrval; 1022 char * lowpass_cutoff_str = tern_find_path(config, "audio\0lowpass_cutoff\0", TVAL_PTR).ptrval;
1008 uint32_t lowpass_cutoff = lowpass_cutoff_str ? atoi(lowpass_cutoff_str) : DEFAULT_LOWPASS_CUTOFF; 1023 uint32_t lowpass_cutoff = lowpass_cutoff_str ? atoi(lowpass_cutoff_str) : DEFAULT_LOWPASS_CUTOFF;
1009 1024
1010 gen->ym = malloc(sizeof(ym2612_context)); 1025 gen->ym = malloc(sizeof(ym2612_context));