Mercurial > repos > blastem
comparison z80_to_x86.c @ 900:30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
author | Michael Pavone <pavone@retrodev.com> |
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date | Fri, 27 Nov 2015 10:47:35 -0800 |
parents | 07bfbbbb4b2e |
children | f765c2fc7508 |
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899:07bfbbbb4b2e | 900:30efd12b1be1 |
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2377 retn(code); | 2377 retn(code); |
2378 | 2378 |
2379 uint32_t tmp_stack_off; | 2379 uint32_t tmp_stack_off; |
2380 | 2380 |
2381 options->gen.handle_cycle_limit = code->cur; | 2381 options->gen.handle_cycle_limit = code->cur; |
2382 //calculate call/stack adjust size | |
2383 sub_ir(code, 16-sizeof(void *), RSP, SZ_PTR); | |
2384 call_noalign(code, options->gen.handle_cycle_limit); | |
2385 uint32_t call_adjust_size = code->cur - options->gen.handle_cycle_limit; | |
2386 code->cur = options->gen.handle_cycle_limit; | |
2387 | |
2382 cmp_rdispr(code, options->gen.context_reg, offsetof(z80_context, sync_cycle), options->gen.cycles, SZ_D); | 2388 cmp_rdispr(code, options->gen.context_reg, offsetof(z80_context, sync_cycle), options->gen.cycles, SZ_D); |
2383 code_ptr no_sync = code->cur+1; | 2389 code_ptr no_sync = code->cur+1; |
2384 jcc(code, CC_B, no_sync); | 2390 jcc(code, CC_B, no_sync); |
2385 mov_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, pc), SZ_W); | 2391 mov_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, pc), SZ_W); |
2386 call(code, options->save_context_scratch); | 2392 call(code, options->save_context_scratch); |
2387 tmp_stack_off = code->stack_off; | 2393 tmp_stack_off = code->stack_off; |
2388 pop_r(code, RAX); //return address in read/write func | 2394 pop_r(code, RAX); //return address in read/write func |
2389 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); | 2395 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
2390 pop_r(code, RBX); //return address in translated code | 2396 pop_r(code, RBX); //return address in translated code |
2391 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); | 2397 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
2392 //FIXME: get the right adjustment value for 32-bit | 2398 sub_ir(code, call_adjust_size, RAX, SZ_PTR); //adjust return address to point to the call + stack adjust that got us here |
2393 sub_ir(code, 9, RAX, SZ_PTR); //adjust return address to point to the call + stack adjust that got us here | |
2394 mov_rrdisp(code, RBX, options->gen.context_reg, offsetof(z80_context, extra_pc), SZ_PTR); | 2399 mov_rrdisp(code, RBX, options->gen.context_reg, offsetof(z80_context, extra_pc), SZ_PTR); |
2395 mov_rrind(code, RAX, options->gen.context_reg, SZ_PTR); | 2400 mov_rrind(code, RAX, options->gen.context_reg, SZ_PTR); |
2396 restore_callee_save_regs(code); | 2401 restore_callee_save_regs(code); |
2397 *no_sync = code->cur - (no_sync + 1); | 2402 *no_sync = code->cur - (no_sync + 1); |
2398 //return to caller of z80_run | 2403 //return to caller of z80_run |
2403 | 2408 |
2404 options->read_8 = gen_mem_fun(&options->gen, chunks, num_chunks, READ_8, &options->read_8_noinc); | 2409 options->read_8 = gen_mem_fun(&options->gen, chunks, num_chunks, READ_8, &options->read_8_noinc); |
2405 options->write_8 = gen_mem_fun(&options->gen, chunks, num_chunks, WRITE_8, &options->write_8_noinc); | 2410 options->write_8 = gen_mem_fun(&options->gen, chunks, num_chunks, WRITE_8, &options->write_8_noinc); |
2406 | 2411 |
2407 code_ptr skip_int = code->cur; | 2412 code_ptr skip_int = code->cur; |
2413 //calculate adjust size | |
2414 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); | |
2415 uint32_t adjust_size = code->cur - skip_int; | |
2416 code->cur = skip_int; | |
2417 | |
2408 cmp_rdispr(code, options->gen.context_reg, offsetof(z80_context, sync_cycle), options->gen.cycles, SZ_D); | 2418 cmp_rdispr(code, options->gen.context_reg, offsetof(z80_context, sync_cycle), options->gen.cycles, SZ_D); |
2409 code_ptr skip_sync = code->cur + 1; | 2419 code_ptr skip_sync = code->cur + 1; |
2410 jcc(code, CC_B, skip_sync); | 2420 jcc(code, CC_B, skip_sync); |
2411 //save PC | 2421 //save PC |
2412 mov_rrdisp(code, options->gen.scratch1, options->gen.context_reg, offsetof(z80_context, pc), SZ_D); | 2422 mov_rrdisp(code, options->gen.scratch1, options->gen.context_reg, offsetof(z80_context, pc), SZ_D); |
2414 call(code, options->gen.save_context); | 2424 call(code, options->gen.save_context); |
2415 tmp_stack_off = code->stack_off; | 2425 tmp_stack_off = code->stack_off; |
2416 //pop return address off the stack and save for resume later | 2426 //pop return address off the stack and save for resume later |
2417 //pop_rind(code, options->gen.context_reg); | 2427 //pop_rind(code, options->gen.context_reg); |
2418 pop_r(code, RAX); | 2428 pop_r(code, RAX); |
2419 //FIXME: get appropriate size for 32-bit | 2429 add_ir(code, adjust_size, RAX, SZ_PTR); |
2420 add_ir(code, 4, RAX, SZ_PTR); | |
2421 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); | 2430 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
2422 mov_rrind(code, RAX, options->gen.context_reg, SZ_PTR); | 2431 mov_rrind(code, RAX, options->gen.context_reg, SZ_PTR); |
2423 | 2432 |
2424 //restore callee saved registers | 2433 //restore callee saved registers |
2425 restore_callee_save_regs(code); | 2434 restore_callee_save_regs(code); |