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comparison m68k_core_x86.c @ 610:314373222b1a

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Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres reg
author Michael Pavone <pavone@retrodev.com>
date Sat, 27 Dec 2014 14:51:50 -0800
parents 49d9928353be
children 744b305965f7
comparison
equal deleted inserted replaced
609:66b730a8ae51 610:314373222b1a
602 mov_irdisp(code, src.disp, opts->gen.context_reg, reg_offset(&(inst->dst)), size); 602 mov_irdisp(code, src.disp, opts->gen.context_reg, reg_offset(&(inst->dst)), size);
603 } 603 }
604 break; 604 break;
605 case MODE_AREG_PREDEC: 605 case MODE_AREG_PREDEC:
606 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (inst->dst.params.regs.pri == 7 ? 2 : 1)); 606 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (inst->dst.params.regs.pri == 7 ? 2 : 1));
607 subi_areg(opts, dec_amount, inst->dst.params.regs.pri);
608 case MODE_AREG_INDIRECT: 607 case MODE_AREG_INDIRECT:
609 case MODE_AREG_POSTINC: 608 case MODE_AREG_POSTINC:
610 areg_to_native(opts, inst->dst.params.regs.pri, opts->gen.scratch2);
611 if (src.mode == MODE_REG_DIRECT) { 609 if (src.mode == MODE_REG_DIRECT) {
612 if (src.base != opts->gen.scratch1) { 610 if (src.base != opts->gen.scratch1) {
613 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size); 611 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size);
614 } 612 }
615 } else if (src.mode == MODE_REG_DISPLACE8) { 613 } else if (src.mode == MODE_REG_DISPLACE8) {
616 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size); 614 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
617 } else { 615 } else {
618 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size); 616 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
619 } 617 }
618 if (inst->dst.addr_mode == MODE_AREG_PREDEC) {
619 subi_areg(opts, dec_amount, inst->dst.params.regs.pri);
620 }
621 areg_to_native(opts, inst->dst.params.regs.pri, opts->gen.scratch2);
620 break; 622 break;
621 case MODE_AREG_DISPLACE: 623 case MODE_AREG_DISPLACE:
622 cycles(&opts->gen, BUS); 624 cycles(&opts->gen, BUS);
623 calc_areg_displace(opts, &inst->dst, opts->gen.scratch2); 625 calc_areg_displace(opts, &inst->dst, opts->gen.scratch2);
624 if (src.mode == MODE_REG_DIRECT) { 626 if (src.mode == MODE_REG_DIRECT) {