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comparison m68k.cpu @ 2053:3414a4423de1 segacd

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Merge from default
author Michael Pavone <pavone@retrodev.com>
date Sat, 15 Jan 2022 13:15:21 -0800
parents 7d4df6b74263
children d1eec03dca09
comparison
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1692:5dacaef602a7 2053:3414a4423de1
1 info
2 prefix m68k_
3 opcode_size 16
4 body m68k_run_op
5 header m68k.h
6 interrupt m68k_interrupt
7 include m68k_util.c
8 sync_cycle m68k_sync_cycle
9
10 declare
11 typedef m68k_context *(*m68k_reset_handler)(m68k_context *context);
12 void init_m68k_opts(m68k_options *opts, memmap_chunk * memmap, uint32_t num_chunks, uint32_t clock_divider);
13 m68k_context *init_68k_context(m68k_options * opts, m68k_reset_handler reset_handler);
14 void m68k_reset(m68k_context *context);
15 void m68k_print_regs(m68k_context *context);
16
17 regs
18 dregs 32 d0 d1 d2 d3 d4 d5 d6 d7
19 aregs 32 a0 a1 a2 a3 a4 a5 a6 a7
20 pc 32
21 other_sp 32
22 scratch1 32
23 scratch2 32
24 int_cycle 32
25 prefetch 16
26 int_priority 8
27 int_num 8
28 int_pending 8
29 int_pending_num 8
30 int_ack 8
31 status 8
32 ccr 8
33 xflag 8
34 nflag 8
35 zflag 8
36 vflag 8
37 cflag 8
38 reset_handler ptrvoid
39 mem_pointers ptrvoid 8
40
41 flags
42 register ccr
43 X 4 carry xflag
44 N 3 sign nflag
45 Z 2 zero zflag
46 V 1 overflow vflag
47 C 0 carry cflag
48
49 m68k_prefetch
50 if dynarec
51
52 ccall m68k_read16_noinc context pc
53 mov result prefetch
54
55 end
56
57 if interp
58
59 mov pc scratch1
60 ocall read_16
61 mov scratch1 prefetch
62
63 end
64
65 add 2 pc pc
66
67 check_user_mode_swap_ssp_usp
68 local tmp 8
69 and 0x20 status tmp
70 if tmp
71 else
72
73 xchg other_sp a7
74
75 end
76
77 m68k_get_sr
78 lsl status 8 scratch1
79 or ccr scratch1 scratch1
80
81 m68k_write32_lowfirst
82 arg value 32
83 add 2 scratch2 scratch2
84 mov value scratch1
85 ocall write_16
86
87 sub 2 scratch2 scratch2
88 lsr value 16 scratch1
89 ocall write_16
90
91 m68k_write32
92 arg value 32
93 local tmp 32
94 mov value tmp
95 lsr value 16 scratch1
96 ocall write_16
97
98 add 2 scratch2 scratch2
99 mov tmp scratch1
100 ocall write_16
101
102 m68k_read32
103 local tmp 32
104 add 2 scratch1 tmp
105 ocall read_16
106 xchg scratch1 tmp
107 ocall read_16
108 lsl tmp 16 tmp
109 or tmp scratch1 scratch1
110
111 m68k_interrupt
112 cmp int_cycle cycles
113 if >=U
114
115 #INT_PENDING_NONE
116 cmp 255 int_pending
117 if =
118
119 mov int_priority int_pending
120 mov int_num int_pending_num
121
122 else
123
124 #INT_PENDING_SR_CHANGE
125 cmp 254 int_pending
126 if =
127
128 mov int_priority int_pending
129 mov int_num int_pending_num
130
131 else
132
133 check_user_mode_swap_ssp_usp
134
135 cycles 6
136 #save status reg
137 sub 6 a7 a7
138 m68k_get_sr
139 mov a7 scratch2
140 ocall write_16
141
142 #update status register
143 and 0x78 status status
144 or int_priority status status
145 or 0x20 status status
146
147 #Interrupt ack cycle
148 mov int_pending int_ack
149 if int_pending_num
150 cycles 4
151 else
152 #TODO: do the whole E clock variable latency nonsense
153 cycles 13
154 add 24 int_pending int_pending_num
155 end
156
157 #save pc
158 add 2 a7 scratch2
159 m68k_write32_lowfirst pc
160
161 lsl int_pending_num 2 scratch1
162 m68k_read32
163 mov scratch1 pc
164 update_sync
165 end
166
167 m68k_run_op
168 dispatch prefetch
169
170 m68k_mem_src
171 arg address 32
172 arg size 16
173 arg isdst 8
174 mov address scratch1
175 if isdst
176 mov address scratch2
177 meta ismem 1
178 end
179 switch size
180
181 case 0
182 ocall read_8
183
184 case 1
185 ocall read_16
186
187 case 2
188 m68k_read32
189
190 end
191 meta op scratch1
192
193 m68k_write_size
194 arg size 16
195 arg lowfirst 8
196 switch size
197 case 0
198 ocall write_8
199
200 case 1
201 ocall write_16
202
203 case 2
204 if lowfirst
205 m68k_write32_lowfirst scratch1
206 else
207 m68k_write32 scratch1
208 end
209 end
210
211 m68k_index_word
212 m68k_prefetch
213 local disp 32
214 and prefetch 255 disp
215 sext 16 disp disp
216 sext 32 disp disp
217 local index 16
218 lsr prefetch 12 index
219 local isareg 16
220 and index 8 isareg
221 and index 7 index
222 local islong 16
223 and prefetch 2048 islong
224
225 switch isareg
226 case 0
227 switch islong
228 case 0
229 sext 32 dregs.index scratch1
230 case 2048
231 mov dregs.index scratch1
232 end
233 case 8
234 switch islong
235 case 0
236 sext 32 aregs.index scratch1
237 case 2048
238 mov aregs.index scratch1
239 end
240 end
241 add disp scratch1 scratch1
242
243 m68k_fetch_op_ea
244 arg mode 16
245 arg reg 16
246 arg Z 16
247 arg isdst 8
248 switch mode
249
250 case 0
251 #data reg direct
252 meta op dregs.reg
253 if isdst
254 meta ismem 0
255 end
256
257 case 1
258 #address reg direct
259 meta op aregs.reg
260 if isdst
261 meta ismem 0
262 end
263
264 case 2
265 #address reg indirect
266 m68k_mem_src aregs.reg Z isdst
267
268 case 3
269 #postincrement
270 m68k_mem_src aregs.reg Z isdst
271 switch reg
272 case 7
273 if Z
274 addsize Z aregs.reg aregs.reg
275 else
276 addsize 1 aregs.reg aregs.reg
277 end
278 default
279 addsize Z aregs.reg aregs.reg
280 end
281
282 case 4
283 #predecrement
284 switch reg
285 case 7
286 if Z
287 decsize Z aregs.reg aregs.reg
288 else
289 decsize 1 aregs.reg aregs.reg
290 end
291 default
292 decsize Z aregs.reg aregs.reg
293 end
294 cycles 2
295 m68k_mem_src aregs.reg Z isdst
296
297 case 5
298 #displacement
299 m68k_prefetch
300 sext 32 prefetch scratch1
301 add scratch1 aregs.reg scratch1
302 m68k_mem_src scratch1 Z isdst
303
304 case 6
305 #indexed
306 m68k_index_word
307 add aregs.reg scratch1 scratch1
308
309 m68k_mem_src scratch1 Z isdst
310 case 7
311 #pc-relative and absolute modes
312
313 switch reg
314 case 0
315 #absolute short
316 m68k_prefetch
317 sext 32 prefetch scratch1
318 m68k_mem_src scratch1 Z isdst
319
320 case 1
321 #absolute long
322 local address 32
323 m68k_prefetch
324 lsl prefetch 16 address
325 m68k_prefetch
326 or prefetch address scratch1
327 m68k_mem_src scratch1 Z isdst
328
329 case 2
330 #pc displaceent
331 m68k_prefetch
332 sext 32 prefetch scratch1
333 add scratch1 pc scratch1
334 sub 2 scratch1 scratch1
335 m68k_mem_src scratch1 Z isdst
336
337 case 3
338 #pc indexed
339 m68k_index_word
340 add pc scratch1 scratch1
341 sub 2 scratch1 scratch1
342 m68k_mem_src scratch1 Z isdst
343
344 case 4
345 #immediate
346 switch Z
347 case 2
348 local tmp32 32
349 m68k_prefetch
350 lsl prefetch 16 tmp32
351 m68k_prefetch
352 or prefetch tmp32 scratch1
353
354 default
355 m68k_prefetch
356 mov prefetch scratch1
357 end
358 meta op scratch1
359
360 end
361
362 end
363
364 m68k_fetch_src_ea
365 arg mode 16
366 arg reg 16
367 arg Z 16
368 m68k_fetch_op_ea mode reg Z 0
369 meta src op
370 switch mode
371 case 0
372 meta src_is_mem 0
373 case 1
374 meta src_is_mem 0
375 default
376 meta src_is_mem 1
377 end
378
379 m68k_fetch_dst_ea
380 arg mode 16
381 arg reg 16
382 arg Z 16
383 m68k_fetch_op_ea mode reg Z 1
384 meta dst op
385
386 m68k_save_dst
387 arg Z 16
388 if ismem
389 m68k_write_size Z 0
390 end
391
392 1101DDD0ZZMMMRRR add_ea_dn
393 invalid M 7 R 5
394 invalid M 7 R 6
395 invalid M 7 R 7
396 invalid Z 3
397 m68k_fetch_src_ea M R Z
398
399 add src dregs.D dregs.D Z
400 update_flags XNZVC
401 m68k_prefetch
402
403 1101DDD1ZZMMMRRR add_dn_ea
404 invalid M 0
405 invalid M 1
406 invalid M 7 R 2
407 invalid M 7 R 3
408 invalid M 7 R 4
409 invalid M 7 R 5
410 invalid M 7 R 6
411 invalid M 7 R 7
412 invalid Z 3
413 m68k_fetch_dst_ea M R Z
414
415 add dregs.D dst dst Z
416 update_flags XNZVC
417 m68k_save_dst Z
418 m68k_prefetch
419
420 1101AAAZ11MMMRRR adda
421 invalid M 7 R 5
422 invalid M 7 R 6
423 invalid M 7 R 7
424 local size 16
425 local ext_src 32
426 if Z
427 mov 2 size
428 else
429 mov 1 size
430 end
431 m68k_fetch_src_ea M R size
432 switch size
433 case 1
434 sext 32 src ext_src
435 meta src ext_src
436 end
437
438 add src aregs.A aregs.A
439 m68k_prefetch
440
441 00000110ZZMMMRRR addi
442 local immed 32
443 invalid Z 3
444 invalid M 1
445 invalid M 7 R 2
446 invalid M 7 R 3
447 invalid M 7 R 4
448 invalid M 7 R 5
449 invalid M 7 R 6
450 invalid M 7 R 7
451 #fetch immediate operand
452 m68k_prefetch
453 switch Z
454 case 2
455 lsl prefetch 16 immed
456 m68k_prefetch
457 or prefetch immed immed
458 default
459 mov prefetch immed
460 end
461 #fetch dst EA
462 m68k_fetch_dst_ea M R Z
463
464 add immed dst dst Z
465 update_flags XNZVC
466 m68k_save_dst Z
467 m68k_prefetch
468
469 0101III0ZZMMMRRR addq
470 invalid Z 3
471 invalid M 7 R 2
472 invalid M 7 R 3
473 invalid M 7 R 4
474 invalid M 7 R 5
475 invalid M 7 R 6
476 invalid M 7 R 7
477 local src 32
478 switch I
479 case 0
480 mov 8 src
481 default
482 mov I src
483 end
484
485 m68k_fetch_dst_ea M R Z
486 switch M
487 case 1
488 add src dst dst Z
489 default
490 add src dst dst Z
491 update_flags XNZVC
492 end
493 m68k_save_dst Z
494 m68k_prefetch
495
496 1101DDD1ZZ000SSS addx_dy_dx
497 invalid Z 3
498 adc dregs.S dregs.D dregs.D Z
499 update_flags XNVC
500 switch Z
501 case 0
502 local tmp8 8
503 mov dregs.D tmp8
504 if tmp8
505 update_flags Z0
506 end
507 case 1
508 local tmp16 16
509 mov dregs.D tmp16
510 if tmp16
511 update_flags Z0
512 end
513 case 2
514 if dregs.D
515 update_flags Z0
516 end
517 end
518 m68k_prefetch
519
520 1101DDD1ZZ001SSS addx_ay_ax
521 invalid Z 3
522 if Z
523 decsize Z aregs.S aregs.S
524 else
525 switch S
526 case 7
527 sub 2 aregs.S aregs.S
528 default
529 decsize Z aregs.S aregs.S
530 end
531 end
532 mov aregs.S scratch1
533 switch Z
534 case 0
535 ocall read_8
536 case 1
537 ocall read_16
538 case 2
539 m68k_read32
540 end
541 mov scratch1 scratch2
542 if Z
543 decsize Z aregs.D aregs.D
544 else
545 switch D
546 case 7
547 sub 2 aregs.D aregs.D
548 default
549 decsize Z aregs.D aregs.D
550 end
551 end
552 mov aregs.D scratch1
553 switch Z
554 case 0
555 ocall read_8
556 case 1
557 ocall read_16
558 case 2
559 m68k_read32
560 end
561 adc scratch2 scratch1 scratch1 Z
562 update_flags XNVC
563 switch Z
564 case 0
565 local tmp8 8
566 mov dregs.D tmp8
567 if tmp8
568 update_flags Z0
569 end
570 case 1
571 local tmp16 16
572 mov dregs.D tmp16
573 if tmp16
574 update_flags Z0
575 end
576 case 2
577 if dregs.D
578 update_flags Z0
579 end
580 end
581 mov aregs.D scratch2
582 m68k_write_size Z 0
583 m68k_prefetch
584
585 1100DDD0ZZMMMRRR and_ea_dn
586 invalid M 1
587 invalid M 7 R 5
588 invalid M 7 R 6
589 invalid M 7 R 7
590 invalid Z 3
591 m68k_fetch_src_ea M R Z
592
593 and src dregs.D dregs.D Z
594 update_flags NZV0C0
595 m68k_prefetch
596
597 1100DDD1ZZMMMRRR and_dn_ea
598 invalid M 0
599 invalid M 1
600 invalid M 7 R 2
601 invalid M 7 R 3
602 invalid M 7 R 4
603 invalid M 7 R 5
604 invalid M 7 R 6
605 invalid M 7 R 7
606 invalid Z 3
607 m68k_fetch_dst_ea M R Z
608
609 and dregs.D dst dst Z
610 update_flags NZV0C0
611 m68k_save_dst Z
612 m68k_prefetch
613
614 00000010ZZMMMRRR andi
615 local immed 32
616 invalid Z 3
617 invalid M 1
618 invalid M 7 R 2
619 invalid M 7 R 3
620 invalid M 7 R 4
621 invalid M 7 R 5
622 invalid M 7 R 6
623 invalid M 7 R 7
624 #fetch immediate operand
625 m68k_prefetch
626 switch Z
627 case 2
628 lsl prefetch 16 immed
629 m68k_prefetch
630 or prefetch immed immed
631 default
632 mov prefetch immed
633 end
634 #fetch dst EA
635 m68k_fetch_dst_ea M R Z
636
637 and immed dst dst Z
638 update_flags NZV0C0
639 m68k_save_dst Z
640 m68k_prefetch
641
642 0000001000111100 andi_to_ccr
643 #fetch immediate operand
644 m68k_prefetch
645 and prefetch ccr ccr
646 m68k_prefetch
647
648 1011DDD1ZZMMMRRR eor_dn_ea
649 invalid M 1
650 invalid M 7 R 2
651 invalid M 7 R 3
652 invalid M 7 R 4
653 invalid M 7 R 5
654 invalid M 7 R 6
655 invalid M 7 R 7
656 invalid Z 3
657 m68k_fetch_dst_ea M R Z
658
659 xor dregs.D dst dst Z
660 update_flags NZV0C0
661 m68k_save_dst Z
662 m68k_prefetch
663
664 00001010ZZMMMRRR eori
665 local immed 32
666 invalid Z 3
667 invalid M 1
668 invalid M 7 R 2
669 invalid M 7 R 3
670 invalid M 7 R 4
671 invalid M 7 R 5
672 invalid M 7 R 6
673 invalid M 7 R 7
674 #fetch immediate operand
675 m68k_prefetch
676 switch Z
677 case 2
678 lsl prefetch 16 immed
679 m68k_prefetch
680 or prefetch immed immed
681 default
682 mov prefetch immed
683 end
684 #fetch dst EA
685 m68k_fetch_dst_ea M R Z
686
687 xor immed dst dst Z
688 update_flags NZV0C0
689 m68k_save_dst Z
690 m68k_prefetch
691
692 0000001000111100 eori_to_ccr
693 #fetch immediate operand
694 m68k_prefetch
695 xor prefetch ccr ccr
696 m68k_prefetch
697
698 1000DDD0ZZMMMRRR or_ea_dn
699 invalid M 1
700 invalid M 7 R 5
701 invalid M 7 R 6
702 invalid M 7 R 7
703 invalid Z 3
704 m68k_fetch_src_ea M R Z
705
706 or src dregs.D dregs.D Z
707 update_flags NZV0C0
708 m68k_prefetch
709
710 1000DDD1ZZMMMRRR or_dn_ea
711 invalid M 0
712 invalid M 1
713 invalid M 7 R 2
714 invalid M 7 R 3
715 invalid M 7 R 4
716 invalid M 7 R 5
717 invalid M 7 R 6
718 invalid M 7 R 7
719 invalid Z 3
720 m68k_fetch_dst_ea M R Z
721
722 or dregs.D dst dst Z
723 update_flags NZV0C0
724 m68k_save_dst Z
725 m68k_prefetch
726
727 00000000ZZMMMRRR ori
728 local immed 32
729 invalid Z 3
730 invalid M 1
731 invalid M 7 R 2
732 invalid M 7 R 3
733 invalid M 7 R 4
734 invalid M 7 R 5
735 invalid M 7 R 6
736 invalid M 7 R 7
737 #fetch immediate operand
738 m68k_prefetch
739 switch Z
740 case 2
741 lsl prefetch 16 immed
742 m68k_prefetch
743 or prefetch immed immed
744 default
745 mov prefetch immed
746 end
747 #fetch dst EA
748 m68k_fetch_dst_ea M R Z
749
750 or immed dst dst Z
751 update_flags NZV0C0
752 m68k_save_dst Z
753 m68k_prefetch
754
755 0000000000111100 ori_to_ccr
756 #fetch immediate operand
757 m68k_prefetch
758 or prefetch ccr ccr
759 m68k_prefetch
760
761 1001DDD0ZZMMMRRR sub_ea_dn
762 invalid M 7 R 5
763 invalid M 7 R 6
764 invalid M 7 R 7
765 invalid Z 3
766 m68k_fetch_src_ea M R Z
767
768 sub src dregs.D dregs.D Z
769 update_flags XNZVC
770 m68k_prefetch
771
772 1001DDD1ZZMMMRRR sub_dn_ea
773 invalid M 0
774 invalid M 1
775 invalid M 7 R 2
776 invalid M 7 R 3
777 invalid M 7 R 4
778 invalid M 7 R 5
779 invalid M 7 R 6
780 invalid M 7 R 7
781 invalid Z 3
782 m68k_fetch_dst_ea M R Z
783
784 sub dregs.D dst dst Z
785 update_flags XNZVC
786 m68k_save_dst Z
787 m68k_prefetch
788
789 1001AAAZ11MMMRRR suba
790 invalid M 7 R 5
791 invalid M 7 R 6
792 invalid M 7 R 7
793 local size 16
794 local ext_src 32
795 if Z
796 mov 2 size
797 else
798 mov 1 size
799 end
800 m68k_fetch_src_ea M R size
801 switch size
802 case 1
803 sext 32 src ext_src
804 meta src ext_src
805 end
806
807 sub src aregs.A aregs.A
808 m68k_prefetch
809
810 00000100ZZMMMRRR subi
811 local immed 32
812 invalid Z 3
813 invalid M 1
814 invalid M 7 R 2
815 invalid M 7 R 3
816 invalid M 7 R 4
817 invalid M 7 R 5
818 invalid M 7 R 6
819 invalid M 7 R 7
820 #fetch immediate operand
821 m68k_prefetch
822 switch Z
823 case 2
824 lsl prefetch 16 immed
825 m68k_prefetch
826 or prefetch immed immed
827 default
828 mov prefetch immed
829 end
830 #fetch dst EA
831 m68k_fetch_dst_ea M R Z
832
833 sub immed dst dst Z
834 update_flags XNZVC
835 m68k_save_dst Z
836 m68k_prefetch
837
838 0101III1ZZMMMRRR subq
839 invalid Z 3
840 invalid M 7 R 2
841 invalid M 7 R 3
842 invalid M 7 R 4
843 invalid M 7 R 5
844 invalid M 7 R 6
845 invalid M 7 R 7
846 local src 32
847 switch I
848 case 0
849 mov 8 src
850 default
851 mov I src
852 end
853
854 m68k_fetch_dst_ea M R Z
855 switch M
856 case 1
857 sub src dst dst Z
858 default
859 sub src dst dst Z
860 update_flags XNZVC
861 end
862 m68k_save_dst Z
863 m68k_prefetch
864
865 1110CCC0ZZ001RRR lsri
866 invalid Z 3
867 switch C
868 case 0
869 meta shift 8
870 default
871 meta shift C
872 end
873 lsr dregs.R shift dregs.R Z
874 update_flags XNZV0C
875 add shift shift shift
876 switch Z
877 case 2
878 add 4 shift shift
879 default
880 add 2 shift shift
881 end
882 cycles shift
883 #TODO: should this happen before or after the majority of the shift?
884 m68k_prefetch
885
886 1110CCC0ZZ101RRR lsr_dn
887 invalid Z 3
888 local shift 8
889 and dregs.C 63 shift
890 lsr dregs.R shift dregs.R Z
891 update_flags XNZV0C
892 add shift shift shift
893 switch Z
894 case 2
895 add 4 shift shift
896 default
897 add 2 shift shift
898 end
899 cycles shift
900 #TODO: should this happen before or after the majority of the shift?
901 m68k_prefetch
902
903 1110001011MMMRRR lsr_ea
904 invalid M 0
905 invalid M 1
906 invalid M 7 R 2
907 invalid M 7 R 3
908 invalid M 7 R 4
909 invalid M 7 R 5
910 invalid M 7 R 6
911 invalid M 7 R 7
912
913 m68k_fetch_dst_ea M R 0
914 lsr dst 1 dst
915 update_flags XNZV0C
916 m68k_save_dst 0
917 m68k_prefetch
918
919 1110CCC1ZZ001RRR lsli
920 invalid Z 3
921 switch C
922 case 0
923 meta shift 8
924 default
925 meta shift C
926 end
927 lsl dregs.R shift dregs.R Z
928 update_flags XNZV0C
929 add shift shift shift
930 switch Z
931 case 2
932 add 4 shift shift
933 default
934 add 2 shift shift
935 end
936 cycles shift
937 #TODO: should this happen before or after the majority of the shift?
938 m68k_prefetch
939
940 1110CCC1ZZ101RRR lsl_dn
941 invalid Z 3
942 local shift 8
943 and dregs.C 63 shift
944 lsl dregs.R shift dregs.R Z
945 update_flags XNZV0C
946 add shift shift shift
947 switch Z
948 case 2
949 add 4 shift shift
950 default
951 add 2 shift shift
952 end
953 cycles shift
954 #TODO: should this happen before or after the majority of the shift?
955 m68k_prefetch
956
957 1110001111MMMRRR lsl_ea
958 invalid M 0
959 invalid M 1
960 invalid M 7 R 2
961 invalid M 7 R 3
962 invalid M 7 R 4
963 invalid M 7 R 5
964 invalid M 7 R 6
965 invalid M 7 R 7
966
967 m68k_fetch_dst_ea M R 0
968 lsl dst 1 dst
969 update_flags XNZV0C
970 m68k_save_dst 0
971 m68k_prefetch
972
973 00ZZRRRMMMEEESSS move
974 invalid Z 0
975 invalid M 1
976 invalid M 7 #not actually invalid, but will be handled separately due to DSL limitations
977 invalid E 7 S 5
978 invalid E 7 S 6
979 invalid E 7 S 7
980 local size 8
981 local memsrc 32
982 #move uses a different size format than most instructions
983 switch Z
984 case 1
985 mov 0 size
986 case 2
987 mov 2 size
988 case 3
989 mov 1 size
990 end
991 m68k_fetch_src_ea E S size
992
993 if src_is_mem
994 #avoid clobbering src if we need scratch1
995 mov src memsrc
996 meta src memsrc
997 end
998
999 cmp 0 src size
1000 update_flags NZV0C0
1001
1002 switch M
1003 case 0
1004 mov src dregs.R size
1005
1006 case 2
1007 mov aregs.R scratch2
1008 mov src scratch1
1009 m68k_write_size size 0
1010
1011 case 3
1012 mov aregs.R scratch2
1013 mov src scratch1
1014 switch R
1015 case 7
1016 if size
1017 addsize size aregs.R aregs.R
1018 else
1019 addsize 1 aregs.R aregs.R
1020 end
1021 default
1022 addsize size aregs.R aregs.R
1023 end
1024 m68k_write_size size 0
1025
1026 case 4
1027 mov src scratch1
1028 switch R
1029 case 7
1030 if size
1031 decsize size aregs.R aregs.R
1032 else
1033 decsize 1 aregs.R aregs.R
1034 end
1035 default
1036 decsize size aregs.R aregs.R
1037 end
1038 mov aregs.R scratch2
1039 m68k_write_size size 1
1040
1041 case 5
1042 m68k_prefetch
1043 sext 32 prefetch scratch2
1044 add aregs.R scratch2 scratch2
1045 mov src scratch1
1046 m68k_write_size size 0
1047
1048 case 6
1049 m68k_index_word
1050 add aregs.R scratch1 scratch2
1051 mov src scratch1
1052 m68k_write_size size 0
1053 end
1054 m68k_prefetch
1055
1056
1057 00ZZ00M111EEESSS move_abs
1058 invalid E 7 S 5
1059 invalid E 7 S 6
1060 invalid E 7 S 7
1061 invalid Z 0
1062 local size 8
1063 local memsrc 32
1064 #move uses a different size format than most instructions
1065 switch Z
1066 case 1
1067 mov 0 size
1068 case 2
1069 mov 2 size
1070 case 3
1071 mov 1 size
1072 end
1073 m68k_fetch_src_ea E S size
1074
1075 if src_is_mem
1076 #avoid clobbering src if we need scratch1
1077 mov src memsrc
1078 meta src memsrc
1079 end
1080
1081 cmp 0 src size
1082 update_flags NZV0C0
1083
1084 switch M
1085 case 0
1086 m68k_prefetch
1087 sext 32 prefetch scratch2
1088
1089 case 1
1090 m68k_prefetch
1091 lsl prefetch 16 scratch2
1092 m68k_prefetch
1093 or prefetch scratch2 scratch2
1094 end
1095 mov src scratch1
1096 m68k_write_size size 0
1097 m68k_prefetch
1098
1099 00ZZRRR001EEESSS movea
1100 local size 8
1101 invalid Z 0
1102 invalid Z 1
1103 invalid E 7 S 5
1104 invalid E 7 S 6
1105 invalid E 7 S 7
1106 switch Z
1107 case 2
1108 mov 2 size
1109 case 3
1110 mov 1 size
1111 end
1112 m68k_fetch_src_ea E S size
1113 switch Z
1114 case 2
1115 mov src aregs.R
1116 case 3
1117 sext 32 src aregs.R
1118 end
1119 m68k_prefetch
1120
1121 0100010011MMMRRR move_to_ccr
1122 invalid M 1
1123 invalid M 7 R 5
1124 invalid M 7 R 6
1125 invalid M 7 R 7
1126 m68k_fetch_src_ea M R 1
1127 mov scratch1 ccr
1128 m68k_prefetch
1129
1130 0100011011MMMRRR move_to_sr
1131 invalid M 1
1132 invalid M 7 R 5
1133 invalid M 7 R 6
1134 invalid M 7 R 7
1135 m68k_fetch_src_ea M R 1
1136 mov scratch1 ccr
1137 lsr scratch1 8 status
1138 update_sync
1139 m68k_prefetch
1140
1141 0100000011MMMRRR move_from_sr
1142 invalid M 1
1143 invalid M 7 R 2
1144 invalid M 7 R 3
1145 invalid M 7 R 4
1146 invalid M 7 R 5
1147 invalid M 7 R 6
1148 invalid M 7 R 7
1149 m68k_fetch_dst_ea M R 1
1150 lsl status 8 scratch1
1151 or ccr scratch1 scratch1
1152 mov scratch1 dst
1153 m68k_save_dst 1
1154 m68k_prefetch
1155
1156 0100111001110000 reset
1157 cycles 124
1158 if reset_handler
1159 pcall reset_handler m68k_reset_handler context
1160 end