comparison ym2612.h @ 2053:3414a4423de1 segacd

Merge from default
author Michael Pavone <pavone@retrodev.com>
date Sat, 15 Jan 2022 13:15:21 -0800
parents 508522f08e4d
children 0d1d5dccdd28
comparison
equal deleted inserted replaced
1692:5dacaef602a7 2053:3414a4423de1
7 #define YM2612_H_ 7 #define YM2612_H_
8 8
9 #include <stdint.h> 9 #include <stdint.h>
10 #include <stdio.h> 10 #include <stdio.h>
11 #include "serialize.h" 11 #include "serialize.h"
12 #include "render.h" 12 #include "render_audio.h"
13 #include "vgm.h"
13 14
14 #define NUM_PART_REGS (0xB7-0x30) 15 #define NUM_PART_REGS (0xB7-0x30)
15 #define NUM_CHANNELS 6 16 #define NUM_CHANNELS 6
16 #define NUM_OPERATORS (4*NUM_CHANNELS) 17 #define NUM_OPERATORS (4*NUM_CHANNELS)
17 18
18 #define YM_OPT_WAVE_LOG 1 19 #define YM_OPT_WAVE_LOG 1
20 #define YM_OPT_3834 2
19 21
20 typedef struct { 22 typedef struct {
21 int16_t *mod_src[2]; 23 int16_t *mod_src[2];
22 uint32_t phase_counter; 24 uint32_t phase_counter;
25 uint32_t phase_inc;
23 uint16_t envelope; 26 uint16_t envelope;
24 int16_t output; 27 int16_t output;
25 uint16_t total_level; 28 uint16_t total_level;
26 uint16_t sustain_level; 29 uint16_t sustain_level;
27 uint8_t rates[4]; 30 uint8_t rates[4];
37 typedef struct { 40 typedef struct {
38 FILE * logfile; 41 FILE * logfile;
39 uint16_t fnum; 42 uint16_t fnum;
40 int16_t output; 43 int16_t output;
41 int16_t op1_old; 44 int16_t op1_old;
45 int16_t op2_old;
42 uint8_t block_fnum_latch; 46 uint8_t block_fnum_latch;
43 uint8_t block; 47 uint8_t block;
44 uint8_t keycode; 48 uint8_t keycode;
45 uint8_t algorithm; 49 uint8_t algorithm;
46 uint8_t feedback; 50 uint8_t feedback;
63 #define YM_PART1_REGS (YM_REG_END-YM_PART1_START) 67 #define YM_PART1_REGS (YM_REG_END-YM_PART1_START)
64 #define YM_PART2_REGS (YM_REG_END-YM_PART2_START) 68 #define YM_PART2_REGS (YM_REG_END-YM_PART2_START)
65 69
66 typedef struct { 70 typedef struct {
67 audio_source *audio; 71 audio_source *audio;
72 vgm_writer *vgm;
68 uint32_t clock_inc; 73 uint32_t clock_inc;
69 uint32_t current_cycle; 74 uint32_t current_cycle;
70 //TODO: Condense the next two fields into one
71 uint32_t write_cycle; 75 uint32_t write_cycle;
76 uint32_t busy_start;
72 uint32_t busy_cycles; 77 uint32_t busy_cycles;
73 uint32_t lowpass_alpha; 78 uint32_t last_status_cycle;
79 uint32_t invalid_status_decay;
80 uint32_t status_address_mask;
81 int32_t volume_mult;
82 int32_t volume_div;
74 ym_operator operators[NUM_OPERATORS]; 83 ym_operator operators[NUM_OPERATORS];
75 ym_channel channels[NUM_CHANNELS]; 84 ym_channel channels[NUM_CHANNELS];
85 int16_t zero_offset;
76 uint16_t timer_a; 86 uint16_t timer_a;
77 uint16_t timer_a_load; 87 uint16_t timer_a_load;
78 uint16_t env_counter; 88 uint16_t env_counter;
79 ym_supp ch3_supp[3]; 89 ym_supp ch3_supp[3];
80 uint8_t timer_b; 90 uint8_t timer_b;
91 uint8_t lfo_counter; 101 uint8_t lfo_counter;
92 uint8_t lfo_am_step; 102 uint8_t lfo_am_step;
93 uint8_t lfo_pm_step; 103 uint8_t lfo_pm_step;
94 uint8_t csm_keyon; 104 uint8_t csm_keyon;
95 uint8_t status; 105 uint8_t status;
106 uint8_t last_status;
96 uint8_t selected_reg; 107 uint8_t selected_reg;
97 uint8_t selected_part; 108 uint8_t selected_part;
98 uint8_t part1_regs[YM_PART1_REGS]; 109 uint8_t part1_regs[YM_PART1_REGS];
99 uint8_t part2_regs[YM_PART2_REGS]; 110 uint8_t part2_regs[YM_PART2_REGS];
100 } ym2612_context; 111 } ym2612_context;
126 }; 137 };
127 138
128 void ym_init(ym2612_context * context, uint32_t master_clock, uint32_t clock_div, uint32_t options); 139 void ym_init(ym2612_context * context, uint32_t master_clock, uint32_t clock_div, uint32_t options);
129 void ym_reset(ym2612_context *context); 140 void ym_reset(ym2612_context *context);
130 void ym_free(ym2612_context *context); 141 void ym_free(ym2612_context *context);
142 void ym_enable_zero_offset(ym2612_context *context, uint8_t enabled);
131 void ym_adjust_master_clock(ym2612_context * context, uint32_t master_clock); 143 void ym_adjust_master_clock(ym2612_context * context, uint32_t master_clock);
144 void ym_adjust_cycles(ym2612_context *context, uint32_t deduction);
132 void ym_run(ym2612_context * context, uint32_t to_cycle); 145 void ym_run(ym2612_context * context, uint32_t to_cycle);
133 void ym_address_write_part1(ym2612_context * context, uint8_t address); 146 void ym_address_write_part1(ym2612_context * context, uint8_t address);
134 void ym_address_write_part2(ym2612_context * context, uint8_t address); 147 void ym_address_write_part2(ym2612_context * context, uint8_t address);
135 void ym_data_write(ym2612_context * context, uint8_t value); 148 void ym_data_write(ym2612_context * context, uint8_t value);
136 uint8_t ym_read_status(ym2612_context * context); 149 void ym_vgm_log(ym2612_context *context, uint32_t master_clock, vgm_writer *vgm);
150 uint8_t ym_read_status(ym2612_context * context, uint32_t cycle, uint32_t port);
137 uint8_t ym_load_gst(ym2612_context * context, FILE * gstfile); 151 uint8_t ym_load_gst(ym2612_context * context, FILE * gstfile);
138 uint8_t ym_save_gst(ym2612_context * context, FILE * gstfile); 152 uint8_t ym_save_gst(ym2612_context * context, FILE * gstfile);
139 void ym_print_channel_info(ym2612_context *context, int channel); 153 void ym_print_channel_info(ym2612_context *context, int channel);
140 void ym_print_timer_info(ym2612_context *context); 154 void ym_print_timer_info(ym2612_context *context);
141 void ym_serialize(ym2612_context *context, serialize_buffer *buf); 155 void ym_serialize(ym2612_context *context, serialize_buffer *buf);