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comparison cpu_dsl.py @ 2666:38c281ef57b0

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Memory access optimizaiton in new 68K core that gives a modest speed bump on average and will allow low-cost watchpoints
author Michael Pavone <pavone@retrodev.com>
date Fri, 07 Mar 2025 23:40:58 -0800
parents 47e197d40ffe
children 6894a25ebfaa
comparison
equal deleted inserted replaced
2665:54ac5fe14cf9 2666:38c281ef57b0
1817 1817
1818 def processLine(self, parts): 1818 def processLine(self, parts):
1819 if len(parts) == 3: 1819 if len(parts) == 3:
1820 if parts[1].startswith('ptr'): 1820 if parts[1].startswith('ptr'):
1821 self.addPointer(parts[0], parts[1][3:], int(parts[2])) 1821 self.addPointer(parts[0], parts[1][3:], int(parts[2]))
1822 else: 1822 elif parts[1].isdigit():
1823 self.addRegArray(parts[0], int(parts[1]), int(parts[2])) 1823 self.addRegArray(parts[0], int(parts[1]), int(parts[2]))
1824 else:
1825 #assume some other C type
1826 self.addRegArray(parts[0], parts[1], int(parts[2]))
1824 elif len(parts) > 2: 1827 elif len(parts) > 2:
1825 self.addRegArray(parts[0], int(parts[1]), parts[2:]) 1828 self.addRegArray(parts[0], int(parts[1]), parts[2:])
1826 else: 1829 else:
1827 if parts[1].startswith('ptr'): 1830 if parts[1].startswith('ptr'):
1828 self.addPointer(parts[0], parts[1][3:], 1) 1831 self.addPointer(parts[0], parts[1][3:], 1)
1829 else: 1832 elif parts[1].isdigit():
1830 self.addReg(parts[0], int(parts[1])) 1833 self.addReg(parts[0], int(parts[1]))
1834 else:
1835 #assume some other C type
1836 self.addReg(parts[0], parts[1])
1831 return self 1837 return self
1832 1838
1833 def writeHeader(self, otype, hFile): 1839 def writeHeader(self, otype, hFile):
1834 fieldList = [] 1840 fieldList = []
1835 for pointer in self.pointers: 1841 for pointer in self.pointers:
1845 else: 1851 else:
1846 arr = '' 1852 arr = ''
1847 hFile.write('\n\t{ptype} {stars}{nm}{arr};'.format(nm=pointer, ptype=ptype, stars=stars, arr=arr)) 1853 hFile.write('\n\t{ptype} {stars}{nm}{arr};'.format(nm=pointer, ptype=ptype, stars=stars, arr=arr))
1848 for reg in self.regs: 1854 for reg in self.regs:
1849 if not self.isRegArrayMember(reg): 1855 if not self.isRegArrayMember(reg):
1850 fieldList.append((self.regs[reg], 1, reg)) 1856 if type(self.regs[reg]) is int:
1857 fieldList.append((self.regs[reg], 1, reg))
1858 else:
1859 hFile.write(f'\n\t{self.regs[reg]} {reg};')
1851 for arr in self.regArrays: 1860 for arr in self.regArrays:
1852 size,regs = self.regArrays[arr] 1861 size,regs = self.regArrays[arr]
1853 if not type(regs) is int: 1862 if not type(regs) is int:
1854 regs = len(regs) 1863 regs = len(regs)
1864 if not type(size) is int:
1865 hFile.write(f'\n\t{size} {arr}[{regs}];')
1866 continue
1855 fieldList.append((size, regs, arr)) 1867 fieldList.append((size, regs, arr))
1856 fieldList.sort() 1868 fieldList.sort()
1857 fieldList.reverse() 1869 fieldList.reverse()
1858 for size, count, name in fieldList: 1870 for size, count, name in fieldList:
1859 if count > 1: 1871 if count > 1: