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comparison z80_to_x86.c @ 269:3c054d977175

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Fix IX/IY displace modes. Fix check for registers requiring REX.
author Mike Pavone <pavone@retrodev.com>
date Thu, 02 May 2013 22:18:22 -0700
parents 6c2d7e003a55
children 9b04b57434b5
comparison
equal deleted inserted replaced
268:6c2d7e003a55 269:3c054d977175
121 } else if(opts->regs[inst->reg] >= 0) { 121 } else if(opts->regs[inst->reg] >= 0) {
122 ea->base = opts->regs[inst->reg]; 122 ea->base = opts->regs[inst->reg];
123 if (ea->base >= AH && ea->base <= BH) { 123 if (ea->base >= AH && ea->base <= BH) {
124 if ((inst->addr_mode & 0x1F) == Z80_REG) { 124 if ((inst->addr_mode & 0x1F) == Z80_REG) {
125 uint8_t other_reg = opts->regs[inst->ea_reg]; 125 uint8_t other_reg = opts->regs[inst->ea_reg];
126 if (other_reg > R8 || (other_reg >= RSP && other_reg <= RDI)) { 126 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) {
127 //we can't mix an *H reg with a register that requires the REX prefix 127 //we can't mix an *H reg with a register that requires the REX prefix
128 ea->base = opts->regs[z80_low_reg(inst->reg)]; 128 ea->base = opts->regs[z80_low_reg(inst->reg)];
129 dst = ror_ir(dst, 8, ea->base, SZ_W); 129 dst = ror_ir(dst, 8, ea->base, SZ_W);
130 } 130 }
131 } else if((inst->addr_mode & 0x1F) != Z80_UNUSED && (inst->addr_mode & 0x1F) != Z80_IMMED) { 131 } else if((inst->addr_mode & 0x1F) != Z80_UNUSED && (inst->addr_mode & 0x1F) != Z80_IMMED) {
148 if (inst->reg == Z80_IYH) { 148 if (inst->reg == Z80_IYH) {
149 dst = ror_ir(dst, 8, opts->regs[Z80_IY], SZ_W); 149 dst = ror_ir(dst, 8, opts->regs[Z80_IY], SZ_W);
150 } else if (opts->regs[inst->reg] >= AH && opts->regs[inst->reg] <= BH) { 150 } else if (opts->regs[inst->reg] >= AH && opts->regs[inst->reg] <= BH) {
151 if ((inst->addr_mode & 0x1F) == Z80_REG) { 151 if ((inst->addr_mode & 0x1F) == Z80_REG) {
152 uint8_t other_reg = opts->regs[inst->ea_reg]; 152 uint8_t other_reg = opts->regs[inst->ea_reg];
153 if (other_reg > R8 || (other_reg >= RSP && other_reg <= RDI)) { 153 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) {
154 //we can't mix an *H reg with a register that requires the REX prefix 154 //we can't mix an *H reg with a register that requires the REX prefix
155 dst = ror_ir(dst, 8, opts->regs[z80_low_reg(inst->reg)], SZ_W); 155 dst = ror_ir(dst, 8, opts->regs[z80_low_reg(inst->reg)], SZ_W);
156 } 156 }
157 } else if((inst->addr_mode & 0x1F) != Z80_UNUSED && (inst->addr_mode & 0x1F) != Z80_IMMED) { 157 } else if((inst->addr_mode & 0x1F) != Z80_UNUSED && (inst->addr_mode & 0x1F) != Z80_IMMED) {
158 //temp regs require REX prefix too 158 //temp regs require REX prefix too
175 dst = ror_ir(dst, 8, opts->regs[Z80_IY], SZ_W); 175 dst = ror_ir(dst, 8, opts->regs[Z80_IY], SZ_W);
176 } else { 176 } else {
177 ea->base = opts->regs[inst->ea_reg]; 177 ea->base = opts->regs[inst->ea_reg];
178 if (ea->base >= AH && ea->base <= BH && inst->reg != Z80_UNUSED && inst->reg != Z80_USE_IMMED) { 178 if (ea->base >= AH && ea->base <= BH && inst->reg != Z80_UNUSED && inst->reg != Z80_USE_IMMED) {
179 uint8_t other_reg = opts->regs[inst->reg]; 179 uint8_t other_reg = opts->regs[inst->reg];
180 if (other_reg > R8 || (other_reg >= RSP && other_reg <= RDI)) { 180 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) {
181 //we can't mix an *H reg with a register that requires the REX prefix 181 //we can't mix an *H reg with a register that requires the REX prefix
182 ea->base = opts->regs[z80_low_reg(inst->ea_reg)]; 182 ea->base = opts->regs[z80_low_reg(inst->ea_reg)];
183 dst = ror_ir(dst, 8, ea->base, SZ_W); 183 dst = ror_ir(dst, 8, ea->base, SZ_W);
184 } 184 }
185 } 185 }
242 } 242 }
243 if (modify) { 243 if (modify) {
244 dst = pop_r(dst, SCRATCH2); 244 dst = pop_r(dst, SCRATCH2);
245 } 245 }
246 } 246 }
247 ea->base = SCRATCH1;
247 break; 248 break;
248 case Z80_UNUSED: 249 case Z80_UNUSED:
249 ea->mode = MODE_UNUSED; 250 ea->mode = MODE_UNUSED;
250 break; 251 break;
251 default: 252 default:
260 if ((inst->addr_mode & 0x1F) == Z80_REG) { 261 if ((inst->addr_mode & 0x1F) == Z80_REG) {
261 if (inst->ea_reg == Z80_IYH) { 262 if (inst->ea_reg == Z80_IYH) {
262 dst = ror_ir(dst, 8, opts->regs[Z80_IY], SZ_W); 263 dst = ror_ir(dst, 8, opts->regs[Z80_IY], SZ_W);
263 } else if (inst->reg != Z80_UNUSED && inst->reg != Z80_USE_IMMED && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { 264 } else if (inst->reg != Z80_UNUSED && inst->reg != Z80_USE_IMMED && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) {
264 uint8_t other_reg = opts->regs[inst->reg]; 265 uint8_t other_reg = opts->regs[inst->reg];
265 if (other_reg > R8 || (other_reg >= RSP && other_reg <= RDI)) { 266 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) {
266 //we can't mix an *H reg with a register that requires the REX prefix 267 //we can't mix an *H reg with a register that requires the REX prefix
267 dst = ror_ir(dst, 8, opts->regs[z80_low_reg(inst->ea_reg)], SZ_W); 268 dst = ror_ir(dst, 8, opts->regs[z80_low_reg(inst->ea_reg)], SZ_W);
268 } 269 }
269 } 270 }
270 } 271 }