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comparison vdp.c @ 2571:3d14db924e57

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DMA fill and copy should not block VDP data or control port writes
author Michael Pavone <pavone@retrodev.com>
date Sun, 02 Feb 2025 00:31:58 -0800
parents 882ceef923e0
children 941bc319dcd8
comparison
equal deleted inserted replaced
2570:882ceef923e0 2571:3d14db924e57
4964 } 4964 }
4965 4965
4966 int vdp_control_port_write(vdp_context * context, uint16_t value, uint32_t cpu_cycle) 4966 int vdp_control_port_write(vdp_context * context, uint16_t value, uint32_t cpu_cycle)
4967 { 4967 {
4968 //printf("control port write: %X at %d\n", value, context->cycles); 4968 //printf("control port write: %X at %d\n", value, context->cycles);
4969 if (context->flags & FLAG_DMA_RUN) {
4970 return -1;
4971 }
4972 if (context->flags & FLAG_PENDING) { 4969 if (context->flags & FLAG_PENDING) {
4973 context->address_latch = value << 14 & 0x1C000; 4970 context->address_latch = value << 14 & 0x1C000;
4974 context->address = (context->address & 0x3FFF) | context->address_latch; 4971 context->address = (context->address & 0x3FFF) | context->address_latch;
4975 //It seems like the DMA enable bit doesn't so much enable DMA so much 4972 //It seems like the DMA enable bit doesn't so much enable DMA so much
4976 //as it enables changing CD5 from control port writes 4973 //as it enables changing CD5 from control port writes
5054 context->pending_byte = value; 5051 context->pending_byte = value;
5055 context->flags2 |= FLAG2_BYTE_PENDING; 5052 context->flags2 |= FLAG2_BYTE_PENDING;
5056 } 5053 }
5057 } 5054 }
5058 5055
5059 int vdp_data_port_write(vdp_context * context, uint16_t value) 5056 void vdp_data_port_write(vdp_context * context, uint16_t value)
5060 { 5057 {
5061 //printf("data port write: %X at %d\n", value, context->cycles); 5058 //printf("data port write: %X at %d\n", value, context->cycles);
5062 if (context->flags & FLAG_DMA_RUN && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) {
5063 return -1;
5064 }
5065 if (context->flags & FLAG_PENDING) { 5059 if (context->flags & FLAG_PENDING) {
5066 context->flags &= ~FLAG_PENDING; 5060 context->flags &= ~FLAG_PENDING;
5067 //Should these be cleared here? 5061 //Should these be cleared here?
5068 context->flags &= ~FLAG_READ_FETCHED; 5062 context->flags &= ~FLAG_READ_FETCHED;
5069 context->flags2 &= ~FLAG2_READ_PENDING; 5063 context->flags2 &= ~FLAG2_READ_PENDING;
5093 if (context->fifo_read < 0) { 5087 if (context->fifo_read < 0) {
5094 context->fifo_read = context->fifo_write; 5088 context->fifo_read = context->fifo_write;
5095 } 5089 }
5096 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1); 5090 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
5097 increment_address(context); 5091 increment_address(context);
5098 return 0;
5099 } 5092 }
5100 5093
5101 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value) 5094 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value)
5102 { 5095 {
5103 if (context->flags & FLAG_PENDING) { 5096 if (context->flags & FLAG_PENDING) {