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comparison m68k_to_x86.c @ 150:3e68e517cc01

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Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
author Mike Pavone <pavone@retrodev.com>
date Tue, 01 Jan 2013 09:40:17 -0800
parents 5416a5c4628e
children 6b593ea0ed90
comparison
equal deleted inserted replaced
149:139e5dcd6aa3 150:3e68e517cc01
40 void m68k_native_addr(); 40 void m68k_native_addr();
41 void m68k_native_addr_and_sync(); 41 void m68k_native_addr_and_sync();
42 void set_sr(); 42 void set_sr();
43 void set_ccr(); 43 void set_ccr();
44 void get_sr(); 44 void get_sr();
45 void do_sync();
45 void m68k_start_context(uint8_t * addr, m68k_context * context); 46 void m68k_start_context(uint8_t * addr, m68k_context * context);
46 47
47 uint8_t * cycles(uint8_t * dst, uint32_t num) 48 uint8_t * cycles(uint8_t * dst, uint32_t num)
48 { 49 {
49 dst = add_ir(dst, num, CYCLES, SZ_D); 50 dst = add_ir(dst, num, CYCLES, SZ_D);
2245 //leave supervisor mode 2246 //leave supervisor mode
2246 dst = mov_rr(dst, opts->aregs[7], SCRATCH1, SZ_B); 2247 dst = mov_rr(dst, opts->aregs[7], SCRATCH1, SZ_B);
2247 dst = mov_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t) * 8, opts->aregs[7], SZ_B); 2248 dst = mov_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t) * 8, opts->aregs[7], SZ_B);
2248 dst = mov_rrdisp8(dst, SCRATCH1, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t) * 8, SZ_B); 2249 dst = mov_rrdisp8(dst, SCRATCH1, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t) * 8, SZ_B);
2249 } 2250 }
2251 if (inst->src.params.immed & 0x700) {
2252 dst = call(dst, (uint8_t *)do_sync);
2253 }
2250 } 2254 }
2251 break; 2255 break;
2252 case M68K_ASL: 2256 case M68K_ASL:
2253 case M68K_LSL: 2257 case M68K_LSL:
2254 dst = translate_shift(dst, inst, &src_op, &dst_op, opts, shl_ir, shl_irdisp8, shl_clr, shl_clrdisp8, shr_ir, shr_irdisp8); 2258 dst = translate_shift(dst, inst, &src_op, &dst_op, opts, shl_ir, shl_irdisp8, shl_clr, shl_clrdisp8, shr_ir, shr_irdisp8);
2445 //leave supervisor mode 2449 //leave supervisor mode
2446 dst = mov_rr(dst, opts->aregs[7], SCRATCH1, SZ_D); 2450 dst = mov_rr(dst, opts->aregs[7], SCRATCH1, SZ_D);
2447 dst = mov_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t) * 8, opts->aregs[7], SZ_D); 2451 dst = mov_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t) * 8, opts->aregs[7], SZ_D);
2448 dst = mov_rrdisp8(dst, SCRATCH1, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t) * 8, SZ_D); 2452 dst = mov_rrdisp8(dst, SCRATCH1, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t) * 8, SZ_D);
2449 } 2453 }
2454 dst = call(dst, (uint8_t *)do_sync);
2450 } 2455 }
2451 dst = cycles(dst, 12); 2456 dst = cycles(dst, 12);
2452 } else { 2457 } else {
2453 if (src_op.base != SCRATCH1) { 2458 if (src_op.base != SCRATCH1) {
2454 if (src_op.mode == MODE_REG_DIRECT) { 2459 if (src_op.mode == MODE_REG_DIRECT) {
2555 dst = mov_ir(dst, 1, FLAG_N, SZ_B); 2560 dst = mov_ir(dst, 1, FLAG_N, SZ_B);
2556 } 2561 }
2557 if (inst->src.params.immed & 0x10) { 2562 if (inst->src.params.immed & 0x10) {
2558 dst = mov_irind(dst, 1, CONTEXT, SZ_B); 2563 dst = mov_irind(dst, 1, CONTEXT, SZ_B);
2559 } 2564 }
2560 if (inst->op == M68K_ANDI_SR) { 2565 if (inst->op == M68K_ORI_SR) {
2561 dst = or_irdisp8(dst, inst->src.params.immed >> 8, CONTEXT, offsetof(m68k_context, status), SZ_B); 2566 dst = or_irdisp8(dst, inst->src.params.immed >> 8, CONTEXT, offsetof(m68k_context, status), SZ_B);
2567 if (inst->src.params.immed & 0x700) {
2568 dst = call(dst, (uint8_t *)do_sync);
2569 }
2562 } 2570 }
2563 break; 2571 break;
2564 /*case M68K_RESET:*/ 2572 /*case M68K_RESET:*/
2565 case M68K_ROL: 2573 case M68K_ROL:
2566 case M68K_ROR: 2574 case M68K_ROR:
2919 dst_end = opts->code_end; 2927 dst_end = opts->code_end;
2920 } 2928 }
2921 next = m68k_decode(encoded, &instbuf, address); 2929 next = m68k_decode(encoded, &instbuf, address);
2922 address += (next-encoded)*2; 2930 address += (next-encoded)*2;
2923 encoded = next; 2931 encoded = next;
2924 m68k_disasm(&instbuf, disbuf); 2932 //m68k_disasm(&instbuf, disbuf);
2925 printf("%X: %s\n", instbuf.address, disbuf); 2933 //printf("%X: %s\n", instbuf.address, disbuf);
2926 dst = translate_m68k(dst, &instbuf, opts); 2934 dst = translate_m68k(dst, &instbuf, opts);
2927 } while(instbuf.op != M68K_ILLEGAL && instbuf.op != M68K_RTS && instbuf.op != M68K_RTE && !(instbuf.op == M68K_BCC && instbuf.extra.cond == COND_TRUE) && instbuf.op != M68K_JMP); 2935 } while(instbuf.op != M68K_ILLEGAL && instbuf.op != M68K_RTS && instbuf.op != M68K_RTE && !(instbuf.op == M68K_BCC && instbuf.extra.cond == COND_TRUE) && instbuf.op != M68K_JMP);
2928 process_deferred(opts); 2936 process_deferred(opts);
2929 if (opts->deferred) { 2937 if (opts->deferred) {
2930 address = opts->deferred->address; 2938 address = opts->deferred->address;