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comparison vdp.c @ 23:3e924bb56560

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Fix endianness of VSRAM when read from Genecyst save state
author Mike Pavone <pavone@retrodev.com>
date Sat, 08 Dec 2012 16:02:17 -0800
parents f090a98ccb7e
children 30ae73f96267
comparison
equal deleted inserted replaced
22:f090a98ccb7e 23:3e924bb56560
149 vscroll = 0x3FF; 149 vscroll = 0x3FF;
150 break; 150 break;
151 } 151 }
152 vscroll &= (context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0] + line); 152 vscroll &= (context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0] + line);
153 context->v_offset = vscroll & 0x7; 153 context->v_offset = vscroll & 0x7;
154 printf("BG | line %d, vsram: %d, vscroll: %d, v_offset: %d\n", line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset);
154 vscroll /= 8; 155 vscroll /= 8;
155 uint16_t hscroll_mask; 156 uint16_t hscroll_mask;
156 uint16_t v_mul; 157 uint16_t v_mul;
157 switch(context->regs[REG_SCROLL] & 0x3) 158 switch(context->regs[REG_SCROLL] & 0x3)
158 { 159 {
174 v_mul = 256; 175 v_mul = 256;
175 break; 176 break;
176 } 177 }
177 uint16_t hscroll = (hscroll_val + (column-2) * 8) & hscroll_mask; 178 uint16_t hscroll = (hscroll_val + (column-2) * 8) & hscroll_mask;
178 uint16_t offset = address + ((vscroll * v_mul + hscroll/4) & 0x1FFF); 179 uint16_t offset = address + ((vscroll * v_mul + hscroll/4) & 0x1FFF);
179 //printf("A | line: %d, col: %d, x: %d, hs_mask %X, v_mul: %d, scr reg: %X, tbl addr: %X\n", line, column, hscroll, hscroll_mask, v_mul, context->regs[REG_SCROLL], offset); 180 printf("BG | line: %d, col: %d, x: %d, hs_mask %X, v_mul: %d, scr reg: %X, tbl addr: %X\n", line, column, hscroll, hscroll_mask, v_mul, context->regs[REG_SCROLL], offset);
180 context->col_1 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; 181 context->col_1 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1];
181 hscroll = (hscroll_val + (column-1) * 8) & hscroll_mask; 182 hscroll = (hscroll_val + (column-1) * 8) & hscroll_mask;
182 offset = address + ((vscroll * v_mul + hscroll/4) & 0x1FFF); 183 offset = address + ((vscroll * v_mul + hscroll/4) & 0x1FFF);
183 context->col_2 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; 184 context->col_2 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1];
184 } 185 }
898 for (int i = 0; i < CRAM_SIZE; i++) { 899 for (int i = 0; i < CRAM_SIZE; i++) {
899 context->cram[i] = (tmp_buf[i*2+1] << 8) | tmp_buf[i*2]; 900 context->cram[i] = (tmp_buf[i*2+1] << 8) | tmp_buf[i*2];
900 } 901 }
901 fread(tmp_buf, 2, VSRAM_SIZE, state_file); 902 fread(tmp_buf, 2, VSRAM_SIZE, state_file);
902 for (int i = 0; i < VSRAM_SIZE; i++) { 903 for (int i = 0; i < VSRAM_SIZE; i++) {
903 context->vsram[i] = (tmp_buf[i*2] << 8) | tmp_buf[i*2+1]; 904 context->vsram[i] = (tmp_buf[i*2+1] << 8) | tmp_buf[i*2];
904 } 905 }
905 fseek(state_file, GST_VDP_MEM, SEEK_SET); 906 fseek(state_file, GST_VDP_MEM, SEEK_SET);
906 fread(context->vdpmem, 1, VRAM_SIZE, state_file); 907 fread(context->vdpmem, 1, VRAM_SIZE, state_file);
907 } 908 }