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comparison m68k_core_x86.c @ 1219:4399044adbef

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Fix timing for instructions using BINARY_IMPL
author Michael Pavone <pavone@retrodev.com>
date Sun, 12 Feb 2017 12:38:31 -0800
parents 0649cd8ca097
children 2e6dcb5c11a2
comparison
equal deleted inserted replaced
1218:054472ea077a 1219:4399044adbef
1271 } 1271 }
1272 1272
1273 void translate_m68k_arith(m68k_options *opts, m68kinst * inst, uint32_t flag_mask, host_ea *src_op, host_ea *dst_op) 1273 void translate_m68k_arith(m68k_options *opts, m68kinst * inst, uint32_t flag_mask, host_ea *src_op, host_ea *dst_op)
1274 { 1274 {
1275 code_info *code = &opts->gen.code; 1275 code_info *code = &opts->gen.code;
1276 cycles(&opts->gen, BUS); 1276 uint8_t size = inst->dst.addr_mode == MODE_AREG ? OPSIZE_LONG : inst->extra.size;
1277
1278 uint32_t numcycles;
1279 if ((inst->op == M68K_ADDX || inst->op == M68K_SUBX) && inst->src.addr_mode != MODE_REG) {
1280 numcycles = 6;
1281 } else if (size == OPSIZE_LONG) {
1282 if (inst->op == M68K_CMP) {
1283 numcycles = 6;
1284 } else if (inst->op == M68K_AND && inst->variant == VAR_IMMEDIATE) {
1285 numcycles = 6;
1286 } else if (inst->op == M68K_ADD && inst->dst.addr_mode == MODE_AREG && inst->extra.size == OPSIZE_WORD && inst->variant == VAR_QUICK) {
1287 numcycles = 4;
1288 } else if (inst->dst.addr_mode <= MODE_AREG) {
1289 numcycles = inst->src.addr_mode <= MODE_AREG || inst->src.addr_mode == MODE_IMMEDIATE ? 8 : 6;
1290 } else {
1291 numcycles = 4;
1292 }
1293 } else {
1294 numcycles = 4;
1295 }
1296 cycles(&opts->gen, numcycles);
1297
1277 if (inst->op == M68K_ADDX || inst->op == M68K_SUBX) { 1298 if (inst->op == M68K_ADDX || inst->op == M68K_SUBX) {
1278 flag_to_carry(opts, FLAG_X); 1299 flag_to_carry(opts, FLAG_X);
1279 } 1300 }
1280 uint8_t size = inst->dst.addr_mode == MODE_AREG ? OPSIZE_LONG : inst->extra.size; 1301
1281 if (src_op->mode == MODE_REG_DIRECT) { 1302 if (src_op->mode == MODE_REG_DIRECT) {
1282 if (dst_op->mode == MODE_REG_DIRECT) { 1303 if (dst_op->mode == MODE_REG_DIRECT) {
1283 op_rr(code, inst, src_op->base, dst_op->base, size); 1304 op_rr(code, inst, src_op->base, dst_op->base, size);
1284 } else { 1305 } else {
1285 op_rrdisp(code, inst, src_op->base, dst_op->base, dst_op->disp, size); 1306 op_rrdisp(code, inst, src_op->base, dst_op->base, dst_op->disp, size);