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comparison z80.cpu @ 2443:461fffc226e0

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Sugar for unary operators in CPU DSL
author Michael Pavone <pavone@retrodev.com>
date Mon, 12 Feb 2024 07:42:32 -0800
parents 52cfc7b14dd2
children 251cc75574af
comparison
equal deleted inserted replaced
2442:52cfc7b14dd2 2443:461fffc226e0
164 arg cond 8 164 arg cond 8
165 local invert 8 165 local invert 8
166 switch cond 166 switch cond
167 case 0 167 case 0
168 meta istrue invert 168 meta istrue invert
169 lnot zflag invert 169 invert = !zflag
170 170
171 case 1 171 case 1
172 meta istrue zflag 172 meta istrue zflag
173 173
174 case 2 174 case 2
175 meta istrue invert 175 meta istrue invert
176 not chflags invert 176 invert = ~chflags
177 invert &= 0x80 177 invert &= 0x80
178 178
179 case 3 179 case 3
180 meta istrue invert 180 meta istrue invert
181 and 0x80 chflags invert 181 invert = chflags & 0x80
182 182
183 case 4 183 case 4
184 meta istrue invert 184 meta istrue invert
185 lnot pvflag invert 185 invert = !pvflag
186 186
187 case 5 187 case 5
188 meta istrue pvflag 188 meta istrue pvflag
189 189
190 case 6 190 case 6
191 meta istrue invert 191 meta istrue invert
192 not last_flag_result invert 192 invert = ~last_flag_result
193 invert &= 0x80 193 invert &= 0x80
194 194
195 case 7 195 case 7
196 meta istrue invert 196 meta istrue invert
197 invert = 0x80 & last_flag_result 197 invert = 0x80 & last_flag_result
1517 1517
1518 fd 00101011 dec_iy 1518 fd 00101011 dec_iy
1519 sub 1 iy iy 1519 sub 1 iy iy
1520 1520
1521 00101111 cpl 1521 00101111 cpl
1522 not a a 1522 a = ~a
1523 update_flags YH1XN1 1523 update_flags YH1XN1
1524 1524
1525 ed 01DDD100 neg 1525 ed 01DDD100 neg
1526 neg a a 1526 a = -a
1527 update_flags SZYHVXN1C 1527 update_flags SZYHVXN1C
1528 1528
1529 00111111 ccf 1529 00111111 ccf
1530 local tmp 8 1530 local tmp 8
1531 and 0x80 last_flag_result last_flag_result 1531 and 0x80 last_flag_result last_flag_result
2212 and scratch1 tmp tmp 2212 and scratch1 tmp tmp
2213 update_flags SZH1PN0 2213 update_flags SZH1PN0
2214 2214
2215 cb 10BBBRRR res_reg 2215 cb 10BBBRRR res_reg
2216 local tmp 8 2216 local tmp 8
2217 lsl 1 B tmp 2217 tmp = 1 << B
2218 not tmp tmp 2218 tmp = ~tmp
2219 and main.R tmp main.R 2219 main.R &= tmp
2220 2220
2221 cb 10BBB110 res_hl 2221 cb 10BBB110 res_hl
2222 z80_fetch_hl 2222 z80_fetch_hl
2223 cycles 1 2223 cycles 1
2224 local tmp 8 2224 local tmp 8
2225 lsl 1 B tmp 2225 tmp = 1 << B
2226 not tmp tmp 2226 tmp = ~tmp
2227 and scratch1 tmp scratch1 2227 scratch1 &= tmp
2228 z80_store_hl 2228 z80_store_hl
2229 2229
2230 z80_res_index 2230 z80_res_index
2231 arg bit 8 2231 arg bit 8
2232 arg tmp 8 2232 arg tmp 8
2233 lsl 1 bit tmp 2233 tmp = 1 << bit
2234 not tmp tmp 2234 tmp = ~tmp
2235 mov wz scratch1 2235 scratch1 = wz
2236 ocall read_8 2236 ocall read_8
2237 cycles 1 2237 cycles 1
2238 and scratch1 tmp tmp 2238 tmp &= scratch1
2239 mov tmp scratch1 2239 scratch1 = tmp
2240 z80_store_index 2240 z80_store_index
2241 2241
2242 ddcb 10BBB110 res_ixd 2242 ddcb 10BBB110 res_ixd
2243 local tmp 8 2243 local tmp 8
2244 z80_res_index B tmp 2244 z80_res_index B tmp