comparison blastem.c @ 680:4996369f1463

Some small synchronization improvements that do not seem to fix anything
author Michael Pavone <pavone@retrodev.com>
date Sun, 04 Jan 2015 23:05:37 -0800
parents 7dd83295193a
children 7ed1dbb48f61
comparison
equal deleted inserted replaced
679:7dd83295193a 680:4996369f1463
208 genesis_context * gen = context->system; 208 genesis_context * gen = context->system;
209 vdp_context * v_context = gen->vdp; 209 vdp_context * v_context = gen->vdp;
210 z80_context * z_context = gen->z80; 210 z80_context * z_context = gen->z80;
211 uint32_t mclks = context->current_cycle; 211 uint32_t mclks = context->current_cycle;
212 sync_z80(z_context, mclks); 212 sync_z80(z_context, mclks);
213 sync_sound(gen, mclks);
213 if (mclks >= mclk_target) { 214 if (mclks >= mclk_target) {
214 sync_sound(gen, mclks);
215 gen->ym->current_cycle -= mclk_target;
216 gen->psg->cycles -= mclk_target;
217 if (gen->ym->write_cycle != CYCLE_NEVER) {
218 gen->ym->write_cycle = gen->ym->write_cycle >= mclk_target ? gen->ym->write_cycle - mclk_target : 0;
219 }
220 vdp_run_context(v_context, mclk_target); 215 vdp_run_context(v_context, mclk_target);
221 //printf("reached frame end | MCLK Cycles: %d, Target: %d, VDP cycles: %d\n", mclks, mclk_target, v_context->cycles); 216 if (vdp_is_frame_over(v_context)) {
222 217 //printf("reached frame end | MCLK Cycles: %d, Target: %d, VDP cycles: %d\n", mclks, mclk_target, v_context->cycles);
223 if (!headless) { 218
224 break_on_sync |= wait_render_frame(v_context, frame_limit); 219 if (!headless) {
225 } else if(exit_after){ 220 break_on_sync |= wait_render_frame(v_context, frame_limit);
226 --exit_after; 221 } else if(exit_after){
227 if (!exit_after) { 222 --exit_after;
228 exit(0); 223 if (!exit_after) {
229 } 224 exit(0);
230 } 225 }
231 frame++; 226 }
232 mclks -= mclk_target; 227 frame++;
233 vdp_adjust_cycles(v_context, mclk_target); 228 mclks -= mclk_target;
234 io_adjust_cycles(gen->ports, context->current_cycle, mclk_target); 229 vdp_adjust_cycles(v_context, mclk_target);
235 io_adjust_cycles(gen->ports+1, context->current_cycle, mclk_target); 230 io_adjust_cycles(gen->ports, context->current_cycle, mclk_target);
236 io_adjust_cycles(gen->ports+2, context->current_cycle, mclk_target); 231 io_adjust_cycles(gen->ports+1, context->current_cycle, mclk_target);
237 context->current_cycle -= mclk_target; 232 io_adjust_cycles(gen->ports+2, context->current_cycle, mclk_target);
238 z80_adjust_cycles(z_context, mclk_target); 233 context->current_cycle -= mclk_target;
239 if (mclks) { 234 z80_adjust_cycles(z_context, mclk_target);
235 gen->ym->current_cycle -= mclk_target;
236 gen->psg->cycles -= mclk_target;
237 if (gen->ym->write_cycle != CYCLE_NEVER) {
238 gen->ym->write_cycle = gen->ym->write_cycle >= mclk_target ? gen->ym->write_cycle - mclk_target : 0;
239 }
240 if (mclks) {
241 vdp_run_context(v_context, mclks);
242 }
243 mclk_target = vdp_cycles_to_frame_end(v_context);
244 context->sync_cycle = mclk_target;
245 } else {
240 vdp_run_context(v_context, mclks); 246 vdp_run_context(v_context, mclks);
241 } 247 mclk_target = vdp_cycles_to_frame_end(v_context);
242 mclk_target = vdp_cycles_to_frame_end(v_context); 248 }
243 context->sync_cycle = mclk_target;
244 } else { 249 } else {
245 //printf("running VDP for %d cycles\n", mclks - v_context->cycles); 250 //printf("running VDP for %d cycles\n", mclks - v_context->cycles);
246 vdp_run_context(v_context, mclks); 251 vdp_run_context(v_context, mclks);
247 sync_sound(gen, mclks);
248 } 252 }
249 if (context->int_ack) { 253 if (context->int_ack) {
250 vdp_int_ack(v_context, context->int_ack); 254 vdp_int_ack(v_context, context->int_ack);
251 context->int_ack = 0; 255 context->int_ack = 0;
252 } 256 }
282 genesis_context * gen = context->system; 286 genesis_context * gen = context->system;
283 if (vdp_port < 0x10) { 287 if (vdp_port < 0x10) {
284 int blocked; 288 int blocked;
285 uint32_t before_cycle = v_context->cycles; 289 uint32_t before_cycle = v_context->cycles;
286 if (vdp_port < 4) { 290 if (vdp_port < 4) {
287 gen->bus_busy = 1;
288 while (vdp_data_port_write(v_context, value) < 0) { 291 while (vdp_data_port_write(v_context, value) < 0) {
289 while(v_context->flags & FLAG_DMA_RUN) { 292 while(v_context->flags & FLAG_DMA_RUN) {
290 vdp_run_dma_done(v_context, mclk_target); 293 vdp_run_dma_done(v_context, mclk_target);
291 if (v_context->cycles >= mclk_target) { 294 if (v_context->cycles >= mclk_target) {
292 context->current_cycle = v_context->cycles; 295 context->current_cycle = v_context->cycles;
294 } 297 }
295 } 298 }
296 //context->current_cycle = v_context->cycles; 299 //context->current_cycle = v_context->cycles;
297 } 300 }
298 } else if(vdp_port < 8) { 301 } else if(vdp_port < 8) {
299 gen->bus_busy = 1;
300 blocked = vdp_control_port_write(v_context, value); 302 blocked = vdp_control_port_write(v_context, value);
301 if (blocked) { 303 if (blocked) {
302 while (blocked) { 304 while (blocked) {
303 while(v_context->flags & FLAG_DMA_RUN) { 305 while(v_context->flags & FLAG_DMA_RUN) {
304 vdp_run_dma_done(v_context, mclk_target); 306 vdp_run_dma_done(v_context, mclk_target);
321 exit(1); 323 exit(1);
322 } 324 }
323 if (v_context->cycles != before_cycle) { 325 if (v_context->cycles != before_cycle) {
324 //printf("68K paused for %d (%d) cycles at cycle %d (%d) for write\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle); 326 //printf("68K paused for %d (%d) cycles at cycle %d (%d) for write\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle);
325 context->current_cycle = v_context->cycles; 327 context->current_cycle = v_context->cycles;
328 //Lock the Z80 out of the bus until the VDP access is complete
329 gen->bus_busy = 1;
330 sync_z80(gen->z80, v_context->cycles);
331 gen->bus_busy = 0;
326 } 332 }
327 } else if (vdp_port < 0x18) { 333 } else if (vdp_port < 0x18) {
328 sync_sound(gen, context->current_cycle);
329 psg_write(gen->psg, value); 334 psg_write(gen->psg, value);
330 } else { 335 } else {
331 //TODO: Implement undocumented test register(s) 336 //TODO: Implement undocumented test register(s)
332 }
333 if (gen->bus_busy)
334 {
335 //Lock the Z80 out of the bus until the VDP access is complete
336 sync_z80(gen->z80, v_context->cycles);
337 gen->bus_busy = 0;
338 } 337 }
339 return context; 338 return context;
340 } 339 }
341 340
342 m68k_context * vdp_port_write_b(uint32_t vdp_port, m68k_context * context, uint8_t value) 341 m68k_context * vdp_port_write_b(uint32_t vdp_port, m68k_context * context, uint8_t value)
400 value = vdp_test_port_read(v_context); 399 value = vdp_test_port_read(v_context);
401 } 400 }
402 if (v_context->cycles != before_cycle) { 401 if (v_context->cycles != before_cycle) {
403 //printf("68K paused for %d (%d) cycles at cycle %d (%d) for read\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle); 402 //printf("68K paused for %d (%d) cycles at cycle %d (%d) for read\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle);
404 context->current_cycle = v_context->cycles; 403 context->current_cycle = v_context->cycles;
404 //Lock the Z80 out of the bus until the VDP access is complete
405 genesis_context *gen = context->system;
406 gen->bus_busy = 1;
407 sync_z80(gen->z80, v_context->cycles);
408 gen->bus_busy = 0;
405 } 409 }
406 return value; 410 return value;
407 } 411 }
408 412
409 uint8_t vdp_port_read_b(uint32_t vdp_port, m68k_context * context) 413 uint8_t vdp_port_read_b(uint32_t vdp_port, m68k_context * context)