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comparison dis.c @ 148:4a400aec81bb

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Bail out of disassembly of a particular stream when we hit an invalid instruction
author Mike Pavone <pavone@retrodev.com>
date Tue, 01 Jan 2013 07:04:48 -0800
parents cce22fb4c450
children 6b593ea0ed90
comparison
equal deleted inserted replaced
147:20e77044e861 148:4a400aec81bb
131 encoded = next; 131 encoded = next;
132 //m68k_disasm(&instbuf, disbuf); 132 //m68k_disasm(&instbuf, disbuf);
133 //printf("%X: %s\n", instbuf.address, disbuf); 133 //printf("%X: %s\n", instbuf.address, disbuf);
134 check_reference(&instbuf, &(instbuf.src)); 134 check_reference(&instbuf, &(instbuf.src));
135 check_reference(&instbuf, &(instbuf.dst)); 135 check_reference(&instbuf, &(instbuf.dst));
136 if (instbuf.op == M68K_ILLEGAL || instbuf.op == M68K_RTS || instbuf.op == M68K_RTE) { 136 if (instbuf.op == M68K_ILLEGAL || instbuf.op == M68K_RTS || instbuf.op == M68K_RTE || instbuf.op == M68K_INVALID) {
137 break; 137 break;
138 } else if (instbuf.op == M68K_BCC || instbuf.op == M68K_DBCC || instbuf.op == M68K_BSR) { 138 } else if (instbuf.op == M68K_BCC || instbuf.op == M68K_DBCC || instbuf.op == M68K_BSR) {
139 if (instbuf.op == M68K_BCC && instbuf.extra.cond == COND_TRUE) { 139 if (instbuf.op == M68K_BCC && instbuf.extra.cond == COND_TRUE) {
140 address = instbuf.address + 2 + instbuf.src.params.immed; 140 address = instbuf.address + 2 + instbuf.src.params.immed;
141 encoded = filebuf + address/2; 141 encoded = filebuf + address/2;