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comparison vdp.c @ 621:5196333b37a6

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Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
author Michael Pavone <pavone@retrodev.com>
date Mon, 16 Jun 2014 19:13:28 -0700
parents 1495179d6737
children b76d2a628ab9
comparison
equal deleted inserted replaced
537:6b7a96d0eda8 621:5196333b37a6
225 "05: %.2X | Sprite Attribute Table: $%.4X\n" 225 "05: %.2X | Sprite Attribute Table: $%.4X\n"
226 "0D: %.2X | HScroll Data Table: $%.4X\n", 226 "0D: %.2X | HScroll Data Table: $%.4X\n",
227 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10, 227 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10,
228 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10, 228 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10,
229 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13, 229 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13,
230 context->regs[REG_SAT], (context->regs[REG_SAT] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3E : 0x3F)) << 9, 230 context->regs[REG_SAT], (context->regs[REG_SAT] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x7E : 0x7F)) << 9,
231 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x1F) << 10); 231 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x3F) << 10);
232 char * sizes[] = {"32", "64", "invalid", "128"}; 232 char * sizes[] = {"32", "64", "invalid", "128"};
233 printf("\n**Misc Group**\n" 233 printf("\n**Misc Group**\n"
234 "07: %.2X | Backdrop Color: $%X\n" 234 "07: %.2X | Backdrop Color: $%X\n"
235 "0A: %.2X | H-Int Counter: %u\n" 235 "0A: %.2X | H-Int Counter: %u\n"
236 "0F: %.2X | Auto-increment: $%X\n" 236 "0F: %.2X | Auto-increment: $%X\n"
237 "10: %.2X | Scroll A/B Size: %sx%s\n", 237 "10: %.2X | Scroll A/B Size: %sx%s\n",
238 context->regs[REG_BG_COLOR], context->regs[REG_BG_COLOR], 238 context->regs[REG_BG_COLOR], context->regs[REG_BG_COLOR],
239 context->regs[REG_HINT], context->regs[REG_HINT], 239 context->regs[REG_HINT], context->regs[REG_HINT],
240 context->regs[REG_AUTOINC], context->regs[REG_AUTOINC], 240 context->regs[REG_AUTOINC], context->regs[REG_AUTOINC],
241 context->regs[REG_SCROLL], sizes[context->regs[REG_SCROLL] & 0x3], sizes[context->regs[REG_SCROLL] >> 4 & 0x3]); 241 context->regs[REG_SCROLL], sizes[context->regs[REG_SCROLL] & 0x3], sizes[context->regs[REG_SCROLL] >> 4 & 0x3]);
242 char * src_types[] = {"68K", "68K", "Copy", "Fill"};
243 printf("\n**DMA Group**\n"
244 "13: %.2X |\n"
245 "14: %.2X | DMA Length: $%.4X words\n"
246 "15: %.2X |\n"
247 "16: %.2X |\n"
248 "17: %.2X | DMA Source Address: $%.6X, Type: %s\n",
249 context->regs[REG_DMALEN_L],
250 context->regs[REG_DMALEN_H], context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L],
251 context->regs[REG_DMASRC_L],
252 context->regs[REG_DMASRC_M],
253 context->regs[REG_DMASRC_H],
254 context->regs[REG_DMASRC_H] << 17 | context->regs[REG_DMASRC_M] << 9 | context->regs[REG_DMASRC_L],
255 src_types[context->regs[REG_DMASRC_H] >> 6 & 3]);
242 printf("\n**Internal Group**\n" 256 printf("\n**Internal Group**\n"
243 "Address: %X\n" 257 "Address: %X\n"
244 "CD: %X\n" 258 "CD: %X\n"
245 "Pending: %s\n", 259 "Pending: %s\n",
246 context->address, context->cd, (context->flags & FLAG_PENDING) ? "true" : "false"); 260 context->address, context->cd, (context->flags & FLAG_PENDING) ? "true" : "false");
1420 if (!context->cycles) { 1434 if (!context->cycles) {
1421 latch_mode(context); 1435 latch_mode(context);
1422 } 1436 }
1423 uint32_t linecyc = context->cycles % MCLKS_LINE; 1437 uint32_t linecyc = context->cycles % MCLKS_LINE;
1424 if (linecyc == 0) { 1438 if (linecyc == 0) {
1425 if (line <= 1 || line >= active_lines) { 1439 context->latched_mode &= ~0x81;
1440 context->latched_mode |= context->regs[REG_MODE_4] & 0x81;
1441 if (line < 1 || line >= active_lines) {
1426 context->hint_counter = context->regs[REG_HINT]; 1442 context->hint_counter = context->regs[REG_HINT];
1427 } else if (context->hint_counter) { 1443 } else if (context->hint_counter) {
1428 context->hint_counter--; 1444 context->hint_counter--;
1429 } else { 1445 } else {
1430 context->flags2 |= FLAG2_HINT_PENDING; 1446 context->flags2 |= FLAG2_HINT_PENDING;
1923 if (line >= active_lines) { 1939 if (line >= active_lines) {
1924 return 0xFFFFFFFF; 1940 return 0xFFFFFFFF;
1925 } 1941 }
1926 uint32_t linecyc = context->cycles % MCLKS_LINE; 1942 uint32_t linecyc = context->cycles % MCLKS_LINE;
1927 uint32_t hcycle = context->cycles + context->hint_counter * MCLKS_LINE + MCLKS_LINE - linecyc; 1943 uint32_t hcycle = context->cycles + context->hint_counter * MCLKS_LINE + MCLKS_LINE - linecyc;
1928 if (!line) {
1929 hcycle += MCLKS_LINE;
1930 }
1931 return hcycle; 1944 return hcycle;
1932 } 1945 }
1933 1946
1934 uint32_t vdp_next_vint(vdp_context * context) 1947 uint32_t vdp_next_vint(vdp_context * context)
1935 { 1948 {