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Merge from default
author Michael Pavone <pavone@retrodev.com>
date Sat, 05 Jan 2019 00:58:08 -0800
parents d0a69348add8
children 4f3443ecb6d6
comparison
equal deleted inserted replaced
1504:95b3a1a8b26c 1692:5dacaef602a7
11 #include "system.h" 11 #include "system.h"
12 #include "serialize.h" 12 #include "serialize.h"
13 13
14 #define VDP_REGS 24 14 #define VDP_REGS 24
15 #define CRAM_SIZE 64 15 #define CRAM_SIZE 64
16 #define SHADOW_OFFSET CRAM_SIZE
17 #define HIGHLIGHT_OFFSET (SHADOW_OFFSET+CRAM_SIZE)
18 #define MODE4_OFFSET (HIGHLIGHT_OFFSET+CRAM_SIZE)
16 #define VSRAM_SIZE 40 19 #define VSRAM_SIZE 40
17 #define VRAM_SIZE (64*1024) 20 #define VRAM_SIZE (64*1024)
18 #define BORDER_LEFT 13 21 #define BORDER_LEFT 13
19 #define BORDER_RIGHT 14 22 #define BORDER_RIGHT 14
20 #define HORIZ_BORDER (BORDER_LEFT+BORDER_RIGHT) 23 #define HORIZ_BORDER (BORDER_LEFT+BORDER_RIGHT)
21 #define LINEBUF_SIZE (320+HORIZ_BORDER) //H40 + full border 24 #define LINEBUF_SIZE (320+HORIZ_BORDER) //H40 + full border
25 #define SCROLL_BUFFER_SIZE 32
22 #define BORDER_BOTTOM 13 //TODO: Replace with actual value 26 #define BORDER_BOTTOM 13 //TODO: Replace with actual value
23 #define MAX_DRAWS 40 27 #define MAX_DRAWS 40
24 #define MAX_DRAWS_H32 32 28 #define MAX_DRAWS_H32 32
25 #define MAX_DRAWS_H32_MODE4 8 29 #define MAX_DRAWS_H32_MODE4 8
26 #define MAX_SPRITES_LINE 20 30 #define MAX_SPRITES_LINE 20
145 uint16_t value; 149 uint16_t value;
146 uint8_t cd; 150 uint8_t cd;
147 uint8_t partial; 151 uint8_t partial;
148 } fifo_entry; 152 } fifo_entry;
149 153
150 typedef struct { 154 enum {
151 fifo_entry fifo[FIFO_SIZE]; 155 VDP_DEBUG_PLANE,
152 int32_t fifo_write; 156 VDP_DEBUG_VRAM,
153 int32_t fifo_read; 157 VDP_DEBUG_CRAM,
154 uint32_t address; 158 VDP_DEBUG_COMPOSITE,
155 uint32_t serial_address; 159 VDP_NUM_DEBUG_TYPES
156 uint8_t cd; 160 };
157 uint8_t flags; 161
158 uint8_t regs[VDP_REGS]; 162 typedef struct {
163 system_header *system;
164 //pointer to current line in framebuffer
165 uint32_t *output;
166 uint32_t *done_output;
167 //pointer to current framebuffer
168 uint32_t *fb;
169 uint32_t *debug_fbs[VDP_NUM_DEBUG_TYPES];
170 uint32_t output_pitch;
171 uint32_t debug_fb_pitch[VDP_NUM_DEBUG_TYPES];
172 fifo_entry fifo[FIFO_SIZE];
173 int32_t fifo_write;
174 int32_t fifo_read;
175 uint32_t address;
176 uint32_t serial_address;
177 uint32_t colors[CRAM_SIZE*4];
178 uint32_t debugcolors[1 << (3 + 1 + 1 + 1)];//3 bits for source, 1 bit for priority, 1 bit for shadow, 1 bit for hilight
179 uint16_t cram[CRAM_SIZE];
180 uint32_t frame;
181 uint8_t cd;
182 uint8_t flags;
183 uint8_t regs[VDP_REGS];
159 //cycle count in MCLKs 184 //cycle count in MCLKs
160 uint32_t cycles; 185 uint32_t cycles;
161 uint32_t pending_vint_start; 186 uint32_t pending_vint_start;
162 uint32_t pending_hint_start; 187 uint32_t pending_hint_start;
163 uint8_t *vdpmem; 188 uint16_t vsram[VSRAM_SIZE];
189 uint16_t vscroll_latch[2];
190 uint16_t vcounter;
191 uint16_t inactive_start;
192 uint16_t border_top;
193 uint16_t border_bot;
194 uint16_t hscroll_a;
195 uint16_t hscroll_b;
196 uint16_t h40_lines;
197 uint16_t output_lines;
198 sprite_draw sprite_draw_list[MAX_DRAWS];
199 sprite_info sprite_info_list[MAX_SPRITES_LINE];
200 uint8_t sat_cache[SAT_CACHE_SIZE];
201 uint16_t col_1;
202 uint16_t col_2;
203 uint16_t hv_latch;
204 uint16_t prefetch;
205 uint16_t test_port;
164 //stores 2-bit palette + 4-bit palette index + priority for current sprite line 206 //stores 2-bit palette + 4-bit palette index + priority for current sprite line
165 uint8_t *linebuf; 207 uint8_t linebuf[LINEBUF_SIZE];
166 //pointer to current line in framebuffer 208 uint8_t layer_debug_buf[LINEBUF_SIZE];
167 uint32_t *output; 209 uint8_t hslot; //hcounter/2
168 uint32_t *done_output; 210 uint8_t sprite_index;
169 uint32_t *fb; 211 uint8_t sprite_draws;
170 system_header *system; 212 int8_t slot_counter;
171 uint16_t cram[CRAM_SIZE]; 213 int8_t cur_slot;
172 uint32_t colors[CRAM_SIZE*4]; 214 uint8_t max_sprites_frame;
173 uint32_t debugcolors[1 << (3 + 1 + 1 + 1)];//3 bits for source, 1 bit for priority, 1 bit for shadow, 1 bit for hilight 215 uint8_t max_sprites_line;
174 uint16_t vsram[VSRAM_SIZE]; 216 uint8_t fetch_tmp[2];
175 uint16_t vscroll_latch[2]; 217 uint8_t v_offset;
176 uint32_t output_pitch; 218 uint8_t hint_counter;
177 uint32_t frame; 219 uint8_t flags2;
178 uint16_t vcounter; 220 uint8_t double_res;
179 uint16_t inactive_start; 221 uint8_t buf_a_off;
180 uint16_t border_top; 222 uint8_t buf_b_off;
181 uint16_t border_bot; 223 uint8_t pending_byte;
182 uint16_t hscroll_a; 224 uint8_t state;
183 uint16_t hscroll_b; 225 uint8_t cur_buffer;
184 uint16_t h40_lines; 226 uint8_t tmp_buf_a[SCROLL_BUFFER_SIZE];
185 uint16_t output_lines; 227 uint8_t tmp_buf_b[SCROLL_BUFFER_SIZE];
186 sprite_draw sprite_draw_list[MAX_DRAWS]; 228 uint8_t enabled_debuggers;
187 sprite_info sprite_info_list[MAX_SPRITES_LINE]; 229 uint8_t debug_fb_indices[VDP_NUM_DEBUG_TYPES];
188 uint8_t sat_cache[SAT_CACHE_SIZE]; 230 uint8_t debug_modes[VDP_NUM_DEBUG_TYPES];
189 uint16_t col_1; 231 uint8_t vdpmem[];
190 uint16_t col_2;
191 uint16_t hv_latch;
192 uint16_t prefetch;
193 uint16_t test_port;
194 uint8_t hslot; //hcounter/2
195 uint8_t sprite_index;
196 uint8_t sprite_draws;
197 int8_t slot_counter;
198 int8_t cur_slot;
199 uint8_t max_sprites_frame;
200 uint8_t max_sprites_line;
201 uint8_t fetch_tmp[2];
202 uint8_t v_offset;
203 uint8_t hint_counter;
204 uint8_t flags2;
205 uint8_t double_res;
206 uint8_t buf_a_off;
207 uint8_t buf_b_off;
208 uint8_t debug;
209 uint8_t debug_pal;
210 uint8_t pending_byte;
211 uint8_t state;
212 uint8_t cur_buffer;
213 uint8_t *tmp_buf_a;
214 uint8_t *tmp_buf_b;
215 } vdp_context; 232 } vdp_context;
216 233
217 void init_vdp_context(vdp_context * context, uint8_t region_pal); 234
235
236 vdp_context *init_vdp_context(uint8_t region_pal);
218 void vdp_free(vdp_context *context); 237 void vdp_free(vdp_context *context);
219 void vdp_run_context_full(vdp_context * context, uint32_t target_cycles); 238 void vdp_run_context_full(vdp_context * context, uint32_t target_cycles);
220 void vdp_run_context(vdp_context * context, uint32_t target_cycles); 239 void vdp_run_context(vdp_context * context, uint32_t target_cycles);
221 //runs from current cycle count to VBLANK for the current mode, returns ending cycle count 240 //runs from current cycle count to VBLANK for the current mode, returns ending cycle count
222 uint32_t vdp_run_to_vblank(vdp_context * context); 241 uint32_t vdp_run_to_vblank(vdp_context * context);
250 void vdp_pbc_pause(vdp_context *context); 269 void vdp_pbc_pause(vdp_context *context);
251 void vdp_release_framebuffer(vdp_context *context); 270 void vdp_release_framebuffer(vdp_context *context);
252 void vdp_reacquire_framebuffer(vdp_context *context); 271 void vdp_reacquire_framebuffer(vdp_context *context);
253 void vdp_serialize(vdp_context *context, serialize_buffer *buf); 272 void vdp_serialize(vdp_context *context, serialize_buffer *buf);
254 void vdp_deserialize(deserialize_buffer *buf, void *vcontext); 273 void vdp_deserialize(deserialize_buffer *buf, void *vcontext);
274 void vdp_force_update_framebuffer(vdp_context *context);
275 void vdp_toggle_debug_view(vdp_context *context, uint8_t debug_type);
276 void vdp_inc_debug_mode(vdp_context *context);
277 //to be implemented by the host system
278 uint16_t read_dma_value(uint32_t address);
255 279
256 #endif //VDP_H_ 280 #endif //VDP_H_