Mercurial > repos > blastem

comparison vdp.c @ 1432:5e7e6d9b79ff

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
author Michael Pavone <pavone@retrodev.com>
date Sun, 13 Aug 2017 22:59:01 -0700
parents 030b40139de9
children 40c3be9f1af7
comparison
equal deleted inserted replaced
1431:030b40139de9 1432:5e7e6d9b79ff
924 } 924 }
925 break; 925 break;
926 } 926 }
927 case VSRAM_WRITE: 927 case VSRAM_WRITE:
928 if (((start->address/2) & 63) < VSRAM_SIZE) { 928 if (((start->address/2) & 63) < VSRAM_SIZE) {
929 //printf("VSRAM Write: %X to %X @ vcounter: %d, hslot: %d, cycle: %d\n", start->value, context->address, context->vcounter, context->hslot, context->cycles); 929 //printf("VSRAM Write: %X to %X @ frame: %d, vcounter: %d, hslot: %d, cycle: %d\n", start->value, start->address, context->frame, context->vcounter, context->hslot, context->cycles);
930 if (start->partial == 3) { 930 if (start->partial == 3) {
931 if (start->address & 1) { 931 if (start->address & 1) {
932 context->vsram[(start->address/2) & 63] &= 0xFF; 932 context->vsram[(start->address/2) & 63] &= 0xFF;
933 context->vsram[(start->address/2) & 63] |= start->value << 8; 933 context->vsram[(start->address/2) & 63] |= start->value << 8;
934 } else { 934 } else {
2067 switch(context->hslot) 2067 switch(context->hslot)
2068 { 2068 {
2069 for (;;) 2069 for (;;)
2070 { 2070 {
2071 case 165: 2071 case 165:
2072 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
2073 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
2074 //See note in vdp_h32 for why this was originally moved out of read_map_scroll
2075 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232
2076 //pretty consistently
2077 context->vscroll_latch[0] = context->vsram[0];
2078 context->vscroll_latch[1] = context->vsram[1];
2079 }
2072 if (context->state == PREPARING) { 2080 if (context->state == PREPARING) {
2073 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F]; 2081 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
2074 uint32_t *dst = context->output + (context->hslot - BG_START_SLOT) * 2; 2082 uint32_t *dst = context->output + (context->hslot - BG_START_SLOT) * 2;
2075 if (dst >= context->done_output) { 2083 if (dst >= context->done_output) {
2076 *dst = bg_color; 2084 *dst = bg_color;
2160 SPRITE_RENDER_H40(240) 2168 SPRITE_RENDER_H40(240)
2161 SPRITE_RENDER_H40(241) 2169 SPRITE_RENDER_H40(241)
2162 SPRITE_RENDER_H40(242) 2170 SPRITE_RENDER_H40(242)
2163 SPRITE_RENDER_H40(243) //provides "garbage" for border when plane A selected 2171 SPRITE_RENDER_H40(243) //provides "garbage" for border when plane A selected
2164 case 244: 2172 case 244:
2165 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
2166 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
2167 //See note in vdp_h32 for why this was moved out of read_map_scroll
2168 context->vscroll_latch[0] = context->vsram[0];
2169 context->vscroll_latch[1] = context->vsram[1];
2170 }
2171 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; 2173 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
2172 mask = 0; 2174 mask = 0;
2173 if (context->regs[REG_MODE_3] & 0x2) { 2175 if (context->regs[REG_MODE_3] & 0x2) {
2174 mask |= 0xF8; 2176 mask |= 0xF8;
2175 } 2177 }