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comparison cpu_dsl.py @ 2463:679c31768013

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Fix carry flag calculation for neg instruction in CPU DSL
author Michael Pavone <pavone@retrodev.com>
date Fri, 23 Feb 2024 23:09:07 -0800
parents 8b3daed1c076
children 0ca78837e4d2
comparison
equal deleted inserted replaced
2462:3b1b7b272311 2463:679c31768013
393 prog.lastSize = size 393 prog.lastSize = size
394 destSize = prog.paramSize(rawParams[1]) 394 destSize = prog.paramSize(rawParams[1])
395 if destSize > size: 395 if destSize > size:
396 needsSizeAdjust = True 396 needsSizeAdjust = True
397 prog.sizeAdjust = size 397 prog.sizeAdjust = size
398 needsCarry = needsOflow = needsHalf = False
398 if op == '-': 399 if op == '-':
399 if flagUpdates: 400 if flagUpdates:
400 for flag in flagUpdates: 401 for flag in flagUpdates:
401 calc = prog.flags.flagCalc[flag] 402 calc = prog.flags.flagCalc[flag]
402 if calc == 'carry': 403 if calc == 'carry':
405 needsHalf = True 406 needsHalf = True
406 elif calc == 'overflow': 407 elif calc == 'overflow':
407 needsOflow = True 408 needsOflow = True
408 if needsCarry or needsOflow or needsHalf or (flagUpdates and needsSizeAdjust): 409 if needsCarry or needsOflow or needsHalf or (flagUpdates and needsSizeAdjust):
409 size = prog.paramSize(rawParams[1]) 410 size = prog.paramSize(rawParams[1])
410 if needsCarry:
411 size *= 2
412 decl,name = prog.getTemp(size) 411 decl,name = prog.getTemp(size)
413 dst = prog.carryFlowDst = name 412 dst = prog.carryFlowDst = name
414 prog.lastA = 0 413 prog.lastA = 0
415 prog.lastB = params[0] 414 prog.lastB = params[0]
416 prog.lastBFlow = params[0] 415 prog.lastBFlow = params[0]
416 if needsSizeAdjust:
417 return decl + '\n\t{dst} = {op}({a} & {mask});'.format(
418 dst = dst, a = params[0], op = op, mask = (1 << prog.sizeAdjust) - 1
419 )
417 if needsSizeAdjust: 420 if needsSizeAdjust:
418 return decl + '\n\t{dst} = ({dst} & ~{mask}) | (({op}{a}) & {mask});'.format( 421 return decl + '\n\t{dst} = ({dst} & ~{mask}) | (({op}{a}) & {mask});'.format(
419 dst = dst, a = params[0], op = op, mask = (1 << prog.sizeAdjust) - 1 422 dst = dst, a = params[0], op = op, mask = (1 << prog.sizeAdjust) - 1
420 ) 423 )
421 else: 424 else:
496 resultBit = prog.lastB - 1 499 resultBit = prog.lastB - 1
497 else: 500 else:
498 #FIXME!!!!! 501 #FIXME!!!!!
499 resultBit = 0 502 resultBit = 0
500 myRes = prog.lastA 503 myRes = prog.lastA
504 elif prog.lastOp.op == 'neg':
505 if prog.carryFlowDst:
506 realSize = prog.getLastSize()
507 if realSize != prog.paramSize(prog.carryFlowDst):
508 lastDst = '({res} & {mask})'.format(res=lastDst, mask = (1 << realSize) - 1)
509 if type(storage) is tuple:
510 reg,storageBit = storage
511 reg = prog.resolveParam(reg, None, {})
512 output.append('\n\t{reg} = {res} ? ({reg} | {bit}U) : ({reg} & {mask}U);'.format(
513 reg = reg, mask = ~(1 << storageBit), res = lastDst, bit = 1 << storageBit
514 ))
515 else:
516 reg = prog.resolveParam(storage, None, {})
517 output.append('\n\t{reg} = {res} != 0;'.format(
518 reg = reg, res = lastDst
519 ))
520 continue
501 else: 521 else:
502 resultBit = prog.getLastSize() 522 resultBit = prog.getLastSize()
503 if prog.lastOp.op == 'ror': 523 if prog.lastOp.op == 'ror':
504 resultBit -= 1 524 resultBit -= 1
505 elif calc == 'half': 525 elif calc == 'half':