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comparison m68k_to_x86.c @ 179:68af8a56ab7a

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Fix scc to set reg to 0xFF rather than 1 when the condition is true
author Mike Pavone <pavone@retrodev.com>
date Tue, 08 Jan 2013 09:34:24 -0800
parents 48eb62ba63bc
children 3b4ef459aa8d
comparison
equal deleted inserted replaced
178:48eb62ba63bc 179:68af8a56ab7a
1692 dst = cycles(dst, 6); 1692 dst = cycles(dst, 6);
1693 } else { 1693 } else {
1694 dst = cycles(dst, BUS); 1694 dst = cycles(dst, BUS);
1695 } 1695 }
1696 if (dst_op.mode == MODE_REG_DIRECT) { 1696 if (dst_op.mode == MODE_REG_DIRECT) {
1697 dst = mov_ir(dst, cond == COND_TRUE, dst_op.base, SZ_B); 1697 dst = mov_ir(dst, cond == COND_TRUE ? 0xFF : 0, dst_op.base, SZ_B);
1698 } else { 1698 } else {
1699 dst = mov_irdisp8(dst, cond == COND_TRUE, dst_op.base, dst_op.disp, SZ_B); 1699 dst = mov_irdisp8(dst, cond == COND_TRUE ? 0xFF : 0, dst_op.base, dst_op.disp, SZ_B);
1700 } 1700 }
1701 } else { 1701 } else {
1702 uint8_t cc = CC_NZ; 1702 uint8_t cc = CC_NZ;
1703 switch (cond) 1703 switch (cond)
1704 { 1704 {
1739 dst = mov_rr(dst, FLAG_V, SCRATCH1, SZ_B); 1739 dst = mov_rr(dst, FLAG_V, SCRATCH1, SZ_B);
1740 dst = xor_rr(dst, FLAG_N, SCRATCH1, SZ_B); 1740 dst = xor_rr(dst, FLAG_N, SCRATCH1, SZ_B);
1741 dst = or_rr(dst, FLAG_Z, SCRATCH1, SZ_B); 1741 dst = or_rr(dst, FLAG_Z, SCRATCH1, SZ_B);
1742 break; 1742 break;
1743 } 1743 }
1744 if ((inst->dst.addr_mode == MODE_REG || inst->dst.addr_mode == MODE_AREG)) { 1744 uint8_t *true_off = dst + 1;
1745 uint8_t *true_off = dst + 1; 1745 dst = jcc(dst, cc, dst+2);
1746 dst = jcc(dst, cc, dst+2); 1746 dst = cycles(dst, BUS);
1747 dst = cycles(dst, BUS); 1747 if (dst_op.mode == MODE_REG_DIRECT) {
1748 if (dst_op.mode == MODE_REG_DIRECT) { 1748 dst = mov_ir(dst, 0, dst_op.base, SZ_B);
1749 dst = mov_ir(dst, 0, dst_op.base, SZ_B); 1749 } else {
1750 } else { 1750 dst = mov_irdisp8(dst, 0, dst_op.base, dst_op.disp, SZ_B);
1751 dst = mov_irdisp8(dst, 0, dst_op.base, dst_op.disp, SZ_B); 1751 }
1752 } 1752 uint8_t *end_off = dst+1;
1753 uint8_t *end_off = dst+1; 1753 dst = jmp(dst, dst+2);
1754 dst = jmp(dst, dst+2); 1754 *true_off = dst - (true_off+1);
1755 *true_off = dst - (true_off+1); 1755 dst = cycles(dst, 6);
1756 dst = cycles(dst, 6); 1756 if (dst_op.mode == MODE_REG_DIRECT) {
1757 if (dst_op.mode == MODE_REG_DIRECT) { 1757 dst = mov_ir(dst, 0xFF, dst_op.base, SZ_B);
1758 dst = mov_ir(dst, 1, dst_op.base, SZ_B); 1758 } else {
1759 } else { 1759 dst = mov_irdisp8(dst, 0xFF, dst_op.base, dst_op.disp, SZ_B);
1760 dst = mov_irdisp8(dst, 1, dst_op.base, dst_op.disp, SZ_B); 1760 }
1761 } 1761 *end_off = dst - (end_off+1);
1762 *end_off = dst - (end_off+1);
1763 } else {
1764 dst = cycles(dst, BUS);
1765 if (dst_op.mode == MODE_REG_DIRECT) {
1766 dst = setcc_r(dst, cc, dst_op.base);
1767 } else {
1768 dst = setcc_rdisp8(dst, cc, dst_op.base, dst_op.disp);
1769 }
1770 }
1771 } 1762 }
1772 dst = m68k_save_result(inst, dst, opts); 1763 dst = m68k_save_result(inst, dst, opts);
1773 return dst; 1764 return dst;
1774 } 1765 }
1775 1766