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Add a bit of a hack to HINT start cycle to give correct values in my test ROM and further improve prevelance of CRAM dot noise in Outrunners and OD2
author Michael Pavone <pavone@retrodev.com>
date Fri, 19 May 2017 22:07:50 -0700
parents 83bdd358f3a7
children c74a2f31ae5f
comparison
equal deleted inserted replaced
1364:30123ca5856c 1365:6dd2c3edd0b5
2084 SPRITE_RENDER_H40(172) 2084 SPRITE_RENDER_H40(172)
2085 SPRITE_RENDER_H40(173) 2085 SPRITE_RENDER_H40(173)
2086 SPRITE_RENDER_H40(174) 2086 SPRITE_RENDER_H40(174)
2087 SPRITE_RENDER_H40(175) 2087 SPRITE_RENDER_H40(175)
2088 SPRITE_RENDER_H40(176) 2088 SPRITE_RENDER_H40(176)
2089 SPRITE_RENDER_H40(177) 2089 SPRITE_RENDER_H40(177)//End of border?
2090 SPRITE_RENDER_H40(178) 2090 SPRITE_RENDER_H40(178)
2091 SPRITE_RENDER_H40(179) 2091 SPRITE_RENDER_H40(179)
2092 SPRITE_RENDER_H40(180) 2092 SPRITE_RENDER_H40(180)
2093 SPRITE_RENDER_H40(181) 2093 SPRITE_RENDER_H40(181)
2094 SPRITE_RENDER_H40(182) 2094 SPRITE_RENDER_H40(182)
3254 uint32_t vdp_cycles_to_frame_end(vdp_context * context) 3254 uint32_t vdp_cycles_to_frame_end(vdp_context * context)
3255 { 3255 {
3256 return context->cycles + vdp_cycles_to_line(context, context->inactive_start); 3256 return context->cycles + vdp_cycles_to_line(context, context->inactive_start);
3257 } 3257 }
3258 3258
3259 //This gives correct values in my test ROM. Kind of a hack, might be partly
3260 //due to interrupts getting latched at the end of a "dbi" micro-instruction
3261 //but that would only account for 28 of the 36 cycles. More hardware testing
3262 //necessary to determine the cause of the discrepency
3263 #define HINT_FUDGE 36
3259 uint32_t vdp_next_hint(vdp_context * context) 3264 uint32_t vdp_next_hint(vdp_context * context)
3260 { 3265 {
3261 if (!(context->regs[REG_MODE_1] & BIT_HINT_EN)) { 3266 if (!(context->regs[REG_MODE_1] & BIT_HINT_EN)) {
3262 return 0xFFFFFFFF; 3267 return 0xFFFFFFFF;
3263 } 3268 }
3264 if (context->flags2 & FLAG2_HINT_PENDING) { 3269 if (context->flags2 & FLAG2_HINT_PENDING) {
3265 return context->pending_hint_start; 3270 return context->pending_hint_start - HINT_FUDGE;
3266 } 3271 }
3267 uint32_t hint_line; 3272 uint32_t hint_line;
3268 if (context->state != ACTIVE) { 3273 if (context->state != ACTIVE) {
3269 hint_line = context->regs[REG_HINT]; 3274 hint_line = context->regs[REG_HINT];
3270 if (hint_line > context->inactive_start) { 3275 if (hint_line > context->inactive_start) {
3288 if (hint_line < context->vcounter && hint_line > context->inactive_start) { 3293 if (hint_line < context->vcounter && hint_line > context->inactive_start) {
3289 return 0xFFFFFFFF; 3294 return 0xFFFFFFFF;
3290 } 3295 }
3291 } 3296 }
3292 } 3297 }
3293 return context->cycles + vdp_cycles_to_line(context, hint_line); 3298 return context->cycles + vdp_cycles_to_line(context, hint_line) - HINT_FUDGE;
3294 } 3299 }
3295 3300
3296 static uint32_t vdp_next_vint_real(vdp_context * context) 3301 static uint32_t vdp_next_vint_real(vdp_context * context)
3297 { 3302 {
3298 if (!(context->regs[REG_MODE_2] & BIT_VINT_EN)) { 3303 if (!(context->regs[REG_MODE_2] & BIT_VINT_EN)) {