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comparison ym2612.h @ 848:7068a9db6dd0

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Wrote a buggy tool for splitting VGM files by channel
author Michael Pavone <pavone@retrodev.com>
date Sun, 01 Nov 2015 12:55:08 -0800
parents 3a18b5f63afc
children 252dfd29831d
comparison
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847:7decd421cdc8 848:7068a9db6dd0
96 uint8_t selected_part; 96 uint8_t selected_part;
97 uint8_t part1_regs[YM_PART1_REGS]; 97 uint8_t part1_regs[YM_PART1_REGS];
98 uint8_t part2_regs[YM_PART2_REGS]; 98 uint8_t part2_regs[YM_PART2_REGS];
99 } ym2612_context; 99 } ym2612_context;
100 100
101 enum {
102 REG_LFO = 0x22,
103 REG_TIMERA_HIGH = 0x24,
104 REG_TIMERA_LOW,
105 REG_TIMERB,
106 REG_TIME_CTRL,
107 REG_KEY_ONOFF,
108 REG_DAC = 0x2A,
109 REG_DAC_ENABLE,
110
111 REG_DETUNE_MULT = 0x30,
112 REG_TOTAL_LEVEL = 0x40,
113 REG_ATTACK_KS = 0x50,
114 REG_DECAY_AM = 0x60,
115 REG_SUSTAIN_RATE = 0x70,
116 REG_S_LVL_R_RATE = 0x80,
117
118 REG_FNUM_LOW = 0xA0,
119 REG_BLOCK_FNUM_H = 0xA4,
120 REG_FNUM_LOW_CH3 = 0xA8,
121 REG_BLOCK_FN_CH3 = 0xAC,
122 REG_ALG_FEEDBACK = 0xB0,
123 REG_LR_AMS_PMS = 0xB4
124 };
125
101 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t master_clock, uint32_t clock_div, uint32_t sample_limit, uint32_t options); 126 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t master_clock, uint32_t clock_div, uint32_t sample_limit, uint32_t options);
102 void ym_adjust_master_clock(ym2612_context * context, uint32_t master_clock); 127 void ym_adjust_master_clock(ym2612_context * context, uint32_t master_clock);
103 void ym_run(ym2612_context * context, uint32_t to_cycle); 128 void ym_run(ym2612_context * context, uint32_t to_cycle);
104 void ym_address_write_part1(ym2612_context * context, uint8_t address); 129 void ym_address_write_part1(ym2612_context * context, uint8_t address);
105 void ym_address_write_part2(ym2612_context * context, uint8_t address); 130 void ym_address_write_part2(ym2612_context * context, uint8_t address);