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comparison m68k_core_x86.c @ 979:771875b5f519

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Fix order of writes for move.l with a predec destination
author Michael Pavone <pavone@retrodev.com>
date Sun, 24 Apr 2016 00:22:38 -0700
parents 8cdd4ddedd9a
children 902c53d9c16f
comparison
equal deleted inserted replaced
978:34b811ea1e7c 979:771875b5f519
690 if (inst->dst.addr_mode != MODE_AREG) { 690 if (inst->dst.addr_mode != MODE_AREG) {
691 cmp_ir(code, 0, flags_reg, inst->extra.size); 691 cmp_ir(code, 0, flags_reg, inst->extra.size);
692 update_flags(opts, N|Z|V0|C0); 692 update_flags(opts, N|Z|V0|C0);
693 } 693 }
694 if (inst->dst.addr_mode != MODE_REG && inst->dst.addr_mode != MODE_AREG) { 694 if (inst->dst.addr_mode != MODE_REG && inst->dst.addr_mode != MODE_AREG) {
695 m68k_write_size(opts, inst->extra.size); 695 m68k_write_size(opts, inst->extra.size, inst->dst.addr_mode == MODE_AREG_PREDEC);
696 if (inst->dst.addr_mode == MODE_AREG_POSTINC) { 696 if (inst->dst.addr_mode == MODE_AREG_POSTINC) {
697 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (inst->dst.params.regs.pri == 7 ? 2 : 1)); 697 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (inst->dst.params.regs.pri == 7 ? 2 : 1));
698 addi_areg(opts, inc_amount, inst->dst.params.regs.pri); 698 addi_areg(opts, inc_amount, inst->dst.params.regs.pri);
699 } 699 }
700 } 700 }